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Message-ID: <48a760f2-323f-4448-9d18-9fe651471cdb@lunn.ch>
Date: Sat, 27 Sep 2025 16:29:11 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Luke Howard <lukeh@...l.com>
Cc: netdev@...r.kernel.org, vladimir.oltean@....com, kieran@...nda.com,
jcschroeder@...il.com, max@...tershome.org
Subject: Re: [RFC net-next 2/5] net: dsa: mv88e6xxx: add
MV88E6XXX_G1_ATU_CTL_MAC_AVB setter
On Sat, Sep 27, 2025 at 05:07:05PM +1000, Luke Howard wrote:
> Add accessors for the MACAVB bit, which controls whether certain ATU bits cause
> the entry to be interpreted as AVB or NRL (non-rate-limiting) entries. This is
> necessary on switches such as the 88E6352 and 88E6240 that support both AVB and
> NRL ATU entries.
>
> Signed-off-by: Luke Howard <lukeh@...l.com>
> ---
> drivers/net/dsa/mv88e6xxx/global1.h | 2 ++
> drivers/net/dsa/mv88e6xxx/global1_atu.c | 17 +++++++++++++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h
> index 3dbb7a1b8fe11..74be4c485ab10 100644
> --- a/drivers/net/dsa/mv88e6xxx/global1.h
> +++ b/drivers/net/dsa/mv88e6xxx/global1.h
> @@ -112,6 +112,7 @@
> /* Offset 0x0A: ATU Control Register */
> #define MV88E6XXX_G1_ATU_CTL 0x0a
> #define MV88E6XXX_G1_ATU_CTL_LEARN2ALL 0x0008
> +#define MV88E6XXX_G1_ATU_CTL_MAC_AVB 0x8000
> #define MV88E6161_G1_ATU_CTL_HASH_MASK 0x0003
nitpick: The sorting in this file suggests that they are sorted
highest bits to lowest bits. So MAC_AVB should be before LEARN2ALL.
Andrew
---
pw-bot: cr
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