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Message-ID: <20250930172022.3a6dd03e@kernel.org>
Date: Tue, 30 Sep 2025 17:20:22 -0700
From: Jakub Kicinski <kuba@...nel.org>
To: Heiner Kallweit <hkallweit1@...il.com>, Russell King
<linux@...linux.org.uk>
Cc: Andrew Lunn <andrew+netdev@...n.ch>, Chen-Yu Tsai <wens@...nel.org>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet
<edumazet@...gle.com>, Paolo Abeni <pabeni@...hat.com>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>, Jernej Skrabec
<jernej@...nel.org>, Samuel Holland <samuel@...lland.org>,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org, Andre Przywara <andre.przywara@....com>,
Jernej Skrabec <jernej.skrabec@...il.com>
Subject: Re: [PATCH net-next v8 2/2] net: stmmac: Add support for Allwinner
A523 GMAC200
On Mon, 29 Sep 2025 18:08:04 -0700 Jakub Kicinski wrote:
> On Fri, 26 Sep 2025 03:15:59 +0800 Chen-Yu Tsai wrote:
> > The Allwinner A523 SoC family has a second Ethernet controller, called
> > the GMAC200 in the BSP and T527 datasheet, and referred to as GMAC1 for
> > numbering. This controller, according to BSP sources, is fully
> > compatible with a slightly newer version of the Synopsys DWMAC core.
> > The glue layer around the controller is the same as found around older
> > DWMAC cores on Allwinner SoCs. The only slight difference is that since
> > this is the second controller on the SoC, the register for the clock
> > delay controls is at a different offset. Last, the integration includes
> > a dedicated clock gate for the memory bus and the whole thing is put in
> > a separately controllable power domain.
>
> Hi Andrew, does this look good ?
>
> thread: https://lore.kernel.org/20250925191600.3306595-3-wens@kernel.org
Adding Heiner and Russell, in case Andrew is AFK.
We need an ack from PHY maintainers, the patch seems to be setting
delays regardless of the exact RMII mode. I don't know these things..
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