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Message-ID: <67535617-92fc-44d4-ba2b-060d0408a5e7@bootlin.com>
Date: Fri, 3 Oct 2025 15:24:32 +0200
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
 Abhishek Chauhan <quic_abchauha@...cinc.com>,
 Alexandre Torgue <alexandre.torgue@...s.st.com>,
 Alexis Lothore <alexis.lothore@...tlin.com>,
 Andrew Lunn <andrew+netdev@...n.ch>, Boon Khai Ng <boon.khai.ng@...era.com>,
 Choong Yong Liang <yong.liang.choong@...ux.intel.com>,
 Daniel Machon <daniel.machon@...rochip.com>,
 "David S. Miller" <davem@...emloft.net>,
 Drew Fustini <dfustini@...storrent.com>,
 Emil Renner Berthing <emil.renner.berthing@...onical.com>,
 Eric Dumazet <edumazet@...gle.com>,
 Faizal Rahim <faizal.abdul.rahim@...ux.intel.com>,
 Furong Xu <0x1207@...il.com>, Inochi Amaoto <inochiama@...il.com>,
 Jacob Keller <jacob.e.keller@...el.com>, Jakub Kicinski <kuba@...nel.org>,
 "Jan Petrous (OSS)" <jan.petrous@....nxp.com>,
 Jisheng Zhang <jszhang@...nel.org>, Kees Cook <kees@...nel.org>,
 Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>,
 Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
 Ley Foon Tan <leyfoon.tan@...rfivetech.com>,
 linux-arm-kernel@...ts.infradead.org, linux-arm-msm@...r.kernel.org,
 linux-stm32@...md-mailman.stormreply.com,
 Matthew Gerlach <matthew.gerlach@...era.com>,
 Maxime Coquelin <mcoquelin.stm32@...il.com>,
 Michal Swiatkowski <michal.swiatkowski@...ux.intel.com>,
 netdev@...r.kernel.org, Oleksij Rempel <o.rempel@...gutronix.de>,
 Paolo Abeni <pabeni@...hat.com>, Rohan G Thomas <rohan.g.thomas@...era.com>,
 Shenwei Wang <shenwei.wang@....com>, Simon Horman <horms@...nel.org>,
 Song Yoong Siang <yoong.siang.song@...el.com>,
 Swathi K S <swathi.ks@...sung.com>, Tiezhu Yang <yangtiezhu@...ngson.cn>,
 Vinod Koul <vkoul@...nel.org>, Vladimir Oltean <olteanv@...il.com>,
 Vladimir Oltean <vladimir.oltean@....com>, Yu-Chun Lin <eleanor15x@...il.com>
Subject: Re: [PATCH RFC net-next 0/9] net: stmmac: experimental PCS conversion

Hi Russell,

> Thanks for the offer of testing.
> 
> Do you know how the stmmac core has been synthesized as far as the
> MII interface from it?
> 
> If not, if it's using gmac1000, possibly later cores as well, then
> DMA_HW_FEATURE (or FEATURE0) bits 30:28 should give that information.
> I'd guess GMII, so probably contains 0. The driver doesn't actually
> use these, or even look at them.

When synthesized with Lynx, this reads 0 indeed. On my device there are 
2 instances of socfpga, the other instance doesn't include Lynx and uses 
RGMII, so in that case bits 30:28 read 1.

I hope that helps :)

Maxime


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