netdev - Re: [PATCH net-next 08/12] net: airoha: ppe: Configure SRAM PPE entries via the cpu

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Message-ID: <aPCpIS1Hd4hIb20q@lore-desk>
Date: Thu, 16 Oct 2025 10:13:21 +0200
From: Lorenzo Bianconi <lorenzo@...nel.org>
To: Simon Horman <horms@...nel.org>
Cc: Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	linux-arm-kernel@...ts.infradead.org,
	linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH net-next 08/12] net: airoha: ppe: Configure SRAM PPE
 entries via the cpu

> On Wed, Oct 15, 2025 at 09:15:08AM +0200, Lorenzo Bianconi wrote:
> > Introduce airoha_ppe_foe_commit_sram_entry routine in order to configure
> > the SRAM PPE entries directly via the CPU instead of using the NPU APIs.
> > This is a preliminary patch to enable netfilter flowtable hw offload for
> > AN7583 SoC.
> > 
> > Signed-off-by: Lorenzo Bianconi <lorenzo@...nel.org>
> > ---
> >  drivers/net/ethernet/airoha/airoha_ppe.c | 30 +++++++++++++++++++++++-------
> >  1 file changed, 23 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/net/ethernet/airoha/airoha_ppe.c b/drivers/net/ethernet/airoha/airoha_ppe.c
> > index fcfd2d8826a9c2f8f94f1962c2b2a69f67f7f598..0ee2e41489aaa9de9c1e99d242ee0bec11549750 100644
> > --- a/drivers/net/ethernet/airoha/airoha_ppe.c
> > +++ b/drivers/net/ethernet/airoha/airoha_ppe.c
> > @@ -662,6 +662,27 @@ static bool airoha_ppe_foe_compare_entry(struct airoha_flow_table_entry *e,
> >  	return !memcmp(&e->data.d, &hwe->d, len - sizeof(hwe->ib1));
> >  }
> >  
> > +static int airoha_ppe_foe_commit_sram_entry(struct airoha_ppe *ppe, u32 hash)
> > +{
> > +	struct airoha_foe_entry *hwe = ppe->foe + hash * sizeof(*hwe);
> > +	bool ppe2 = hash >= PPE_SRAM_NUM_ENTRIES;
> > +	u32 *ptr = (u32 *)hwe, val;
> > +	int i;
> > +
> > +	for (i = 0; i < sizeof(*hwe) / 4; i++)
> > +		airoha_fe_wr(ppe->eth, REG_PPE_RAM_ENTRY(ppe2, i), ptr[i]);
> 
> I realise that a similar pattern it is already used elsewhere,
> but '4' seems somewhat magic here.

ack, I will fix it in v2.

Regards,
Lorenzo

> 
> ...

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