[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251021224357.195015-5-heiko@sntech.de>
Date: Wed, 22 Oct 2025 00:43:57 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: andrew+netdev@...n.ch,
davem@...emloft.net,
edumazet@...gle.com,
kuba@...nel.org,
pabeni@...hat.com
Cc: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
heiko@...ech.de,
netdev@...r.kernel.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
David Wu <david.wu@...k-chips.com>
Subject: [PATCH 4/4] ethernet: stmmac: dwmac-rk: Add RK3506 GMAC support
From: David Wu <david.wu@...k-chips.com>
Add the needed glue blocks for the RK3506-specific setup.
The RK3506 dwmac only supports up to 100MBit with a RMII PHY,
but no RGMII.
Signed-off-by: David Wu <david.wu@...k-chips.com>
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
---
.../net/ethernet/stmicro/stmmac/dwmac-rk.c | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 51ea0caf16c1..e1e036e7163c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -827,6 +827,84 @@ static const struct rk_gmac_ops rk3399_ops = {
.set_speed = rk3399_set_speed,
};
+#define RK3506_GRF_SOC_CON8 0X0020
+#define RK3506_GRF_SOC_CON11 0X002c
+
+#define RK3506_GMAC_RMII_MODE GRF_BIT(1)
+
+#define RK3506_GMAC_CLK_RMII_DIV2 GRF_BIT(3)
+#define RK3506_GMAC_CLK_RMII_DIV20 GRF_CLR_BIT(3)
+
+#define RK3506_GMAC_CLK_SELET_CRU GRF_CLR_BIT(5)
+#define RK3506_GMAC_CLK_SELET_IO GRF_BIT(5)
+
+#define RK3506_GMAC_CLK_RMII_GATE GRF_BIT(2)
+#define RK3506_GMAC_CLK_RMII_NOGATE GRF_CLR_BIT(2)
+
+static void rk3506_set_to_rmii(struct rk_priv_data *bsp_priv)
+{
+ struct device *dev = bsp_priv->dev;
+ unsigned int id = bsp_priv->id, offset;
+
+ if (IS_ERR(bsp_priv->grf)) {
+ dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);
+ return;
+ }
+
+ offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
+ regmap_write(bsp_priv->grf, offset, RK3506_GMAC_RMII_MODE);
+}
+
+static int rk3506_set_speed(struct rk_priv_data *bsp_priv,
+ phy_interface_t interface, int speed)
+{
+ struct device *dev = bsp_priv->dev;
+ unsigned int val, offset, id = bsp_priv->id;
+
+ switch (speed) {
+ case 10:
+ val = RK3506_GMAC_CLK_RMII_DIV20;
+ break;
+ case 100:
+ val = RK3506_GMAC_CLK_RMII_DIV2;
+ break;
+ default:
+ dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
+ return -EINVAL;
+ }
+
+ offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
+ regmap_write(bsp_priv->grf, offset, val);
+
+ return 0;
+}
+
+static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
+ bool input, bool enable)
+{
+ unsigned int value, offset, id = bsp_priv->id;
+
+ offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
+
+ value = input ? RK3506_GMAC_CLK_SELET_IO :
+ RK3506_GMAC_CLK_SELET_CRU;
+ value |= enable ? RK3506_GMAC_CLK_RMII_NOGATE :
+ RK3506_GMAC_CLK_RMII_GATE;
+ regmap_write(bsp_priv->grf, offset, value);
+}
+
+static const struct rk_gmac_ops rk3506_ops = {
+ .set_to_rmii = rk3506_set_to_rmii,
+ .set_speed = rk3506_set_speed,
+ .set_clock_selection = rk3506_set_clock_selection,
+ .regs_valid = true,
+ .regs = {
+ 0xff4c8000, /* gmac0 */
+ 0xff4d0000, /* gmac1 */
+ 0x0, /* sentinel */
+ },
+};
+
#define RK3528_VO_GRF_GMAC_CON 0x0018
#define RK3528_VO_GRF_MACPHY_CON0 0x001c
#define RK3528_VO_GRF_MACPHY_CON1 0x0020
@@ -1808,6 +1886,7 @@ static const struct of_device_id rk_gmac_dwmac_match[] = {
{ .compatible = "rockchip,rk3366-gmac", .data = &rk3366_ops },
{ .compatible = "rockchip,rk3368-gmac", .data = &rk3368_ops },
{ .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops },
+ { .compatible = "rockchip,rk3506-gmac", .data = &rk3506_ops },
{ .compatible = "rockchip,rk3528-gmac", .data = &rk3528_ops },
{ .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops },
{ .compatible = "rockchip,rk3576-gmac", .data = &rk3576_ops },
--
2.47.2
Powered by blists - more mailing lists