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Message-ID:
<PAXPR04MB851033505FB2A4673A15EBD488F3A@PAXPR04MB8510.eurprd04.prod.outlook.com>
Date: Wed, 22 Oct 2025 01:44:38 +0000
From: Wei Fang <wei.fang@....com>
To: Paolo Abeni <pabeni@...hat.com>
CC: "imx@...ts.linux.dev" <imx@...ts.linux.dev>, "netdev@...r.kernel.org"
<netdev@...r.kernel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "devicetree@...r.kernel.org"
<devicetree@...r.kernel.org>, "robh@...nel.org" <robh@...nel.org>,
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<conor+dt@...nel.org>, Claudiu Manoil <claudiu.manoil@....com>, Vladimir
Oltean <vladimir.oltean@....com>, Clark Wang <xiaoning.wang@....com>, Frank
Li <frank.li@....com>, "andrew+netdev@...n.ch" <andrew+netdev@...n.ch>,
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<edumazet@...gle.com>, "kuba@...nel.org" <kuba@...nel.org>,
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Subject: RE: [PATCH net-next 6/8] net: enetc: add basic support for the ENETC
with pseudo MAC for i.MX94
> On 10/16/25 12:20 PM, Wei Fang wrote:
> > @@ -635,28 +649,10 @@ static void enetc4_pl_mac_config(struct
> phylink_config *config, unsigned int mod
> >
> > static void enetc4_set_port_speed(struct enetc_ndev_priv *priv, int speed)
> > {
> > - u32 old_speed = priv->speed;
> > - u32 val;
> > -
> > - if (speed == old_speed)
> > - return;
> > -
> > - val = enetc_port_rd(&priv->si->hw, ENETC4_PCR);
> > - val &= ~PCR_PSPEED;
> > -
> > - switch (speed) {
> > - case SPEED_100:
> > - case SPEED_1000:
> > - case SPEED_2500:
> > - case SPEED_10000:
> > - val |= (PCR_PSPEED & PCR_PSPEED_VAL(speed));
> > - break;
> > - case SPEED_10:
> > - default:
> > - val |= (PCR_PSPEED & PCR_PSPEED_VAL(SPEED_10));
> > - }
> > + u32 val = enetc_port_rd(&priv->si->hw, ENETC4_PCR);
> >
> > priv->speed = speed;
> > + val = u32_replace_bits(val, PCR_PSPEED_VAL(speed), PCR_PSPEED);
> > enetc_port_wr(&priv->si->hw, ENETC4_PCR, val);
> > }
>
> The above chunk looks unrelated from the rest of this patch. Perhaps
> worth moving to a separate patch in this series? Or add some comments
> explaining why it's needed.
>
Because the internal link (The link between ENETC and the CPU port of
NETC switch) has a uncommon link speed and it is configurable. So I
removed the switch statement. But I realized that simply modifying the
fixed-link speed in DTS to support this uncommon link speed is not enough.
Although it will not affect the functionality, phylink will report a warning.
For i.MX94, I will set the speed to 2500Mbps in the fixed-link node. So I
will revert this change.
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