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Message-ID: <bb77711420db90fe50a2c1cc9abd77efe31ed18f.1761402873.git.daniel@makrotopia.org>
Date: Sat, 25 Oct 2025 15:50:32 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: Hauke Mehrtens <hauke@...ke-m.de>, Andrew Lunn <andrew@...n.ch>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Simon Horman <horms@...nel.org>,
Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Andreas Schirm <andreas.schirm@...mens.com>,
Lukas Stockmann <lukas.stockmann@...mens.com>,
Alexander Sverdlin <alexander.sverdlin@...mens.com>,
Peter Christen <peter.christen@...mens.com>,
Avinash Jayaraman <ajayaraman@...linear.com>,
Bing tao Xu <bxu@...linear.com>, Liang Xu <lxu@...linear.com>,
Juraj Povazanec <jpovazanec@...linear.com>,
"Fanni (Fang-Yi) Chan" <fchan@...linear.com>,
"Benny (Ying-Tsan) Weng" <yweng@...linear.com>,
"Livia M. Rosu" <lrosu@...linear.com>,
John Crispin <john@...ozen.org>
Subject: [PATCH net-next v2 10/13] dt-bindings: net: dsa: lantiq,gswip: add
support for MaxLinear GSW1xx switches
Extend the Lantiq GSWIP device tree binding to also cover MaxLinear
GSW1xx switches which are based on the same hardware IP but connected
via MDIO instead of being memory-mapped.
Add compatible strings for MaxLinear GSW120, GSW125, GSW140, GSW141,
and GSW145 switches and adjust the schema to handle the different
connection methods with conditional properties.
Add MaxLinear GSW125 example showing MDIO-connected configuration.
Signed-off-by: Daniel Golle <daniel@...rotopia.org>
---
v2:
* remove git conflict left-overs which somehow creeped in
* indent example with 4 spaces instead of tabs
.../bindings/net/dsa/lantiq,gswip.yaml | 264 +++++++++++++-----
1 file changed, 191 insertions(+), 73 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
index 48641c27da10..017021d3b511 100644
--- a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
@@ -4,7 +4,12 @@
$id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Lantiq GSWIP Ethernet switches
+title: Lantiq GSWIP and MaxLinear GSW1xx Ethernet switches
+
+description:
+ Lantiq GSWIP and MaxLinear GSW1xx switches share the same hardware IP.
+ Lantiq switches are embedded in SoCs and accessed via memory-mapped I/O,
+ while MaxLinear switches are standalone ICs connected via MDIO.
allOf:
- $ref: dsa.yaml#/$defs/ethernet-ports
@@ -33,6 +38,98 @@ allOf:
description:
Configure the RMII reference clock to be a clock output
rather than an input. Only applicable for RMII mode.
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - lantiq,xrx200-gswip
+ - lantiq,xrx300-gswip
+ - lantiq,xrx330-gswip
+ then:
+ properties:
+ reg:
+ minItems: 3
+ maxItems: 3
+ description: Memory-mapped register regions (switch, mdio, mii)
+ reg-names:
+ items:
+ - const: switch
+ - const: mdio
+ - const: mii
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ compatible:
+ const: lantiq,xrx200-mdio
+
+ required:
+ - compatible
+ gphy-fw:
+ type: object
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ compatible:
+ items:
+ - enum:
+ - lantiq,xrx200-gphy-fw
+ - lantiq,xrx300-gphy-fw
+ - lantiq,xrx330-gphy-fw
+ - const: lantiq,gphy-fw
+
+ lantiq,rcu:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle to the RCU syscon
+
+ patternProperties:
+ "^gphy@[0-9a-f]{1,2}$":
+ type: object
+
+ additionalProperties: false
+
+ properties:
+ reg:
+ minimum: 0
+ maximum: 255
+ description:
+ Offset of the GPHY firmware register in the RCU register
+ range
+
+ resets:
+ items:
+ - description: GPHY reset line
+
+ reset-names:
+ items:
+ - const: gphy
+
+ required:
+ - reg
+
+ required:
+ - compatible
+ - lantiq,rcu
+
+ additionalProperties: false
+ required:
+ - reg-names
+ else:
+ properties:
+ reg:
+ maxItems: 1
+ description: MDIO bus address
+ reg-names: false
+ gphy-fw: false
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
maintainers:
- Hauke Mehrtens <hauke@...ke-m.de>
@@ -43,78 +140,11 @@ properties:
- lantiq,xrx200-gswip
- lantiq,xrx300-gswip
- lantiq,xrx330-gswip
-
- reg:
- minItems: 3
- maxItems: 3
-
- reg-names:
- items:
- - const: switch
- - const: mdio
- - const: mii
-
- mdio:
- $ref: /schemas/net/mdio.yaml#
- unevaluatedProperties: false
-
- properties:
- compatible:
- const: lantiq,xrx200-mdio
-
- required:
- - compatible
-
- gphy-fw:
- type: object
- properties:
- '#address-cells':
- const: 1
-
- '#size-cells':
- const: 0
-
- compatible:
- items:
- - enum:
- - lantiq,xrx200-gphy-fw
- - lantiq,xrx300-gphy-fw
- - lantiq,xrx330-gphy-fw
- - const: lantiq,gphy-fw
-
- lantiq,rcu:
- $ref: /schemas/types.yaml#/definitions/phandle
- description: phandle to the RCU syscon
-
- patternProperties:
- "^gphy@[0-9a-f]{1,2}$":
- type: object
-
- additionalProperties: false
-
- properties:
- reg:
- minimum: 0
- maximum: 255
- description:
- Offset of the GPHY firmware register in the RCU register range
-
- resets:
- items:
- - description: GPHY reset line
-
- reset-names:
- items:
- - const: gphy
-
- required:
- - reg
-
- required:
- - compatible
- - lantiq,rcu
-
- additionalProperties: false
+ - maxlinear,gsw120
+ - maxlinear,gsw125
+ - maxlinear,gsw140
+ - maxlinear,gsw141
+ - maxlinear,gsw145
required:
- compatible
@@ -129,6 +159,7 @@ examples:
reg = <0xe108000 0x3100>, /* switch */
<0xe10b100 0xd8>, /* mdio */
<0xe10b1d8 0x130>; /* mii */
+ reg-names = "switch", "mdio", "mii";
dsa,member = <0 0>;
ports {
@@ -227,3 +258,90 @@ examples:
};
};
};
+
+ - |
+ #include <dt-bindings/leds/common.h>
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch@1f {
+ compatible = "maxlinear,gsw125";
+ reg = <0x1f>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ phy-handle = <&switchphy0>;
+ phy-mode = "internal";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&switchphy1>;
+ phy-mode = "internal";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ phy-mode = "sgmii";
+ managed = "in-band-status";
+ };
+
+ port@5 {
+ reg = <5>;
+ phy-mode = "rgmii-id";
+ tx-internal-delay-ps = <2000>;
+ rx-internal-delay-ps = <2000>;
+ ethernet = <ð0>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switchphy0: switchphy@0 {
+ reg = <0>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ };
+ };
+ };
+
+ switchphy1: switchphy@1 {
+ reg = <1>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ };
+ };
+ };
+ };
+ };
+ };
--
2.51.0
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