netdev - Re: [PATCH net-next 2/7] net/mlx5e: Use TIR API in mlx5e_modify_tirs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <a3807c58-be93-423c-b801-339c657a0bb9@gmail.com>
Date: Sun, 26 Oct 2025 14:45:54 +0200
From: Tariq Toukan <ttoukan.linux@...il.com>
To: Simon Horman <horms@...nel.org>, Tariq Toukan <tariqt@...dia.com>
Cc: Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
 Paolo Abeni <pabeni@...hat.com>, Andrew Lunn <andrew+netdev@...n.ch>,
 "David S. Miller" <davem@...emloft.net>, Saeed Mahameed <saeedm@...dia.com>,
 Leon Romanovsky <leon@...nel.org>, Mark Bloch <mbloch@...dia.com>,
 netdev@...r.kernel.org, linux-rdma@...r.kernel.org,
 linux-kernel@...r.kernel.org, Gal Pressman <gal@...dia.com>,
 Carolina Jubran <cjubran@...dia.com>, Dragos Tatulea <dtatulea@...dia.com>
Subject: Re: [PATCH net-next 2/7] net/mlx5e: Use TIR API in
 mlx5e_modify_tirs_lb()



On 23/10/2025 16:02, Simon Horman wrote:
> On Thu, Oct 23, 2025 at 09:43:35AM +0300, Tariq Toukan wrote:
> 
> ...
> 
>> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c
>> index 19499072f67f..0b55e77f19c8 100644
>> --- a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c
>> +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c
>> @@ -146,6 +146,31 @@ void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder)
>>   	MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_INVERTED_XOR8);
>>   }
>>   
>> +static void mlx5e_tir_context_self_lb_block(void *tirc, bool enable_uc_lb,
>> +					    bool enable_mc_lb)
>> +{
>> +	u8 lb_flags = 0;
>> +
>> +	if (enable_uc_lb)
>> +		lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
>> +	if (enable_mc_lb)
>> +		lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
>> +
>> +	MLX5_SET(tirc, tirc, self_lb_block, lb_flags);
>> +}
>> +
>> +void mlx5e_tir_builder_build_self_lb_block(struct mlx5e_tir_builder *builder,
>> +					   bool enable_uc_lb,
>> +					   bool enable_mc_lb)
>> +{
>> +	void *tirc = mlx5e_tir_builder_get_tirc(builder);
>> +
>> +	if (builder->modify)
>> +		MLX5_SET(modify_tir_in, builder->in, bitmask.self_lb_en, 1);
>> +
>> +	mlx5e_tir_context_self_lb_block(tirc, enable_uc_lb, enable_mc_lb);
>> +}
>> +
> 
> ...
> 
>> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
>> index 376a018b2db1..fad6b761f622 100644
>> --- a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
>> +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
>> @@ -250,43 +250,30 @@ void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)
>>   int mlx5e_modify_tirs_lb(struct mlx5_core_dev *mdev, bool enable_uc_lb,
>>   			 bool enable_mc_lb)
> 
> ...
> 
>> -	if (enable_uc_lb)
>> -		lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
>> -
>> -	if (enable_mc_lb)
>> -		lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
>> -
>> -	if (lb_flags)
>> -		MLX5_SET(modify_tir_in, in, ctx.self_lb_block, lb_flags);
>> -
>> -	MLX5_SET(modify_tir_in, in, bitmask.self_lb_en, 1);
>> +	mlx5e_tir_builder_build_self_lb_block(builder, enable_uc_lb,
>> +					      enable_mc_lb);
> 
> Hi,
> 
> Maybe I'm reading this wrong, and possibly it is not important,
> but it seems to me that the update above reverses the
> 
> ...
> order of the MLX5_SET() invocations.
> 

The order here is not important.
The FW command is filled in any order and only then FW is called.