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Message-ID: <aQAEyn08Q3DCedUU@makrotopia.org>
Date: Mon, 27 Oct 2025 23:48:26 +0000
From: Daniel Golle <daniel@...rotopia.org>
To: Vladimir Oltean <olteanv@...il.com>
Cc: Hauke Mehrtens <hauke@...ke-m.de>, Andrew Lunn <andrew@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Simon Horman <horms@...nel.org>,
Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Andreas Schirm <andreas.schirm@...mens.com>,
Lukas Stockmann <lukas.stockmann@...mens.com>,
Alexander Sverdlin <alexander.sverdlin@...mens.com>,
Peter Christen <peter.christen@...mens.com>,
Avinash Jayaraman <ajayaraman@...linear.com>,
Bing tao Xu <bxu@...linear.com>, Liang Xu <lxu@...linear.com>,
Juraj Povazanec <jpovazanec@...linear.com>,
"Fanni (Fang-Yi) Chan" <fchan@...linear.com>,
"Benny (Ying-Tsan) Weng" <yweng@...linear.com>,
"Livia M. Rosu" <lrosu@...linear.com>,
John Crispin <john@...ozen.org>
Subject: Re: [PATCH net-next v3 09/12] net: dsa: lantiq_gswip: add vendor
property to setup MII refclk output
On Tue, Oct 28, 2025 at 01:36:26AM +0200, Vladimir Oltean wrote:
> On Sun, Oct 26, 2025 at 11:47:21PM +0000, Daniel Golle wrote:
> > Read boolean Device Tree property "maxlinear,rmii-refclk-out" and switch
> > the RMII reference clock to be a clock output rather than an input if it
> > is set.
> >
> > Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> > ---
> > drivers/net/dsa/lantiq/lantiq_gswip_common.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/net/dsa/lantiq/lantiq_gswip_common.c b/drivers/net/dsa/lantiq/lantiq_gswip_common.c
> > index 60a83093cd10..bf38ecc13f76 100644
> > --- a/drivers/net/dsa/lantiq/lantiq_gswip_common.c
> > +++ b/drivers/net/dsa/lantiq/lantiq_gswip_common.c
> > @@ -1442,6 +1442,10 @@ static void gswip_phylink_mac_config(struct phylink_config *config,
> > return;
> > }
> >
> > + if (of_property_read_bool(dp->dn, "maxlinear,rmii-refclk-out") &&
> > + !(miicfg & GSWIP_MII_CFG_MODE_RGMII))
> > + miicfg |= GSWIP_MII_CFG_RMII_CLK;
> > +
>
> What did you mean with the !(miicfg & GSWIP_MII_CFG_MODE_RGMII) test?
> If the schema says "Only applicable for RMII mode.", what's the purpose
> of this extra condition? For example, GSWIP_MII_CFG_MODE_GMII also has
> the "GSWIP_MII_CFG_MODE_RGMII" bit (0x4) unset. Does this have any significance?
You are right, probably the best would be to test (if at all) that
(miicfg == GSWIP_MII_CFG_MODE_RMIIM || miicfg ==
GSWIP_MII_CFG_MODE_RMIIP) and only in this case allow setting the
GSWIP_MII_CFG_RMII_CLK bit.
I forgot that there is older hardware which supports "full" MII, and MII
MAC as well as MII PHY modes also shouldn't allow to set the
GSWIP_MII_CFG_RMII_CLK bit to not end up with undefined behavior.
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