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Message-ID: <20251107143240.7azxhd3abehjktvu@skbuf>
Date: Fri, 7 Nov 2025 16:32:40 +0200
From: Vladimir Oltean <vladimir.oltean@....com>
To: Andrew Lunn <andrew@...n.ch>
Cc: netdev@...r.kernel.org, Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Marek Vasut <marex@...x.de>, Wei Fang <wei.fang@....com>,
Clark Wang <xiaoning.wang@....com>
Subject: Re: [PATCH v2 net-next 6/6] net: phy: realtek: create
rtl8211f_config_phy_eee() helper
On Fri, Nov 07, 2025 at 02:34:54PM +0100, Andrew Lunn wrote:
> On Fri, Nov 07, 2025 at 01:08:17PM +0200, Vladimir Oltean wrote:
> > To simplify the rtl8211f_config_init() control flow and get rid of
> > "early" returns for PHYs where the PHYCR2 register is absent, move the
> > entire logic sub-block that deals with disabling PHY-mode EEE to a
> > separate function. There, it is much more obvious what the early
> > "return 0" skips, and it becomes more difficult to accidentally skip
> > unintended stuff.
> >
> > Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
> > ---
> > v1->v2: patch is new
> >
> > drivers/net/phy/realtek/realtek_main.c | 29 ++++++++++++++++----------
> > 1 file changed, 18 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
> > index 4501b8923aad..6e75e124f27a 100644
> > --- a/drivers/net/phy/realtek/realtek_main.c
> > +++ b/drivers/net/phy/realtek/realtek_main.c
> > @@ -684,6 +684,23 @@ static int rtl8211f_config_aldps(struct phy_device *phydev)
> > mask, mask);
> > }
> >
> > +static int rtl8211f_config_phy_eee(struct phy_device *phydev)
> > +{
> > + int ret;
> > +
> > + /* RTL8211FVD has no PHYCR2 register */
> > + if (phydev->drv->phy_id == RTL_8211FVD_PHYID)
> > + return 0;
> > +
> > + /* Disable PHY-mode EEE so LPI is passed to the MAC */
> > + ret = phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2,
> > + RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
> > + if (ret)
> > + return ret;
> > +
> > + return genphy_soft_reset(phydev);
>
> Is this soft reset only required for EEE? None of the other
> configuration needs it?
It's good you point this out. Somehow, among all transformations, I lost
along the way the fact that the soft reset is necessary for disabling
clkout on RTL8211F, not for PHY-mode EEE :-/
https://elixir.bootlin.com/linux/v6.16.12/source/drivers/net/phy/realtek/realtek_main.c#L598
I checked the RTL8211F datasheet and it doesn't say that changes to the
"PHY-mode EEE Enable" field would need a write to 0.15 to take effect.
But it does say that about "CLKOUT Source".
Curiously, the RTL8211FVD datasheet doesn't suggest that modifying the
CLKOUT source needs a soft reset when providing the steps to do so.
Anyway, this code transformation from patch 6/6 is not buggy per se
(even if we change the CLKOUT on RTL8211F, we still get the
genphy_soft_reset() that we need), but very misleading and confusing.
pw-bot: cr
> For the Marvell PHYs, lots of registers need a soft reset to put
> changes into effect. I would not want to hide the soft reset inside a
> helper, because of the danger more calls to helps are added
> afterwards.
Ok, I get your point and I agree, but what to do?
static int rtl8211f_config_init(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
bool needs_reset;
int ret;
ret = rtl8211f_config_aldps(phydev);
if (ret) {
dev_err(dev, "aldps mode configuration failed: %pe\n",
ERR_PTR(ret));
return ret;
}
ret = rtl8211f_config_rgmii_delay(phydev);
if (ret)
return ret;
ret = rtl8211f_config_clk_out(phydev, &needs_reset); // RTL8211F needs it, RTL8211FVD doesn't
if (ret) {
dev_err(dev, "clkout configuration failed: %pe\n",
ERR_PTR(ret));
return ret;
}
ret = rtl8211f_config_phy_eee(phydev);
if (ret)
return ret;
if (needs_reset) {
ret = genphy_soft_reset(phydev);
if (ret)
return ret;
}
return 0;
}
?
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