netdev - Re: [PATCH v2 net-next 6/6] net: phy: realtek: create rtl8211f_config_phy

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20251113121357.uu3em364s24ehm2q@skbuf>
Date: Thu, 13 Nov 2025 14:13:57 +0200
From: Vladimir Oltean <vladimir.oltean@....com>
To: Andrew Lunn <andrew@...n.ch>
Cc: netdev@...r.kernel.org, Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Marek Vasut <marex@...x.de>, Wei Fang <wei.fang@....com>,
	Clark Wang <xiaoning.wang@....com>
Subject: Re: [PATCH v2 net-next 6/6] net: phy: realtek: create
 rtl8211f_config_phy_eee() helper

On Fri, Nov 07, 2025 at 05:18:01PM +0100, Andrew Lunn wrote:
> > It's good you point this out. Somehow, among all transformations, I lost
> > along the way the fact that the soft reset is necessary for disabling
> > clkout on RTL8211F, not for PHY-mode EEE :-/
> > https://elixir.bootlin.com/linux/v6.16.12/source/drivers/net/phy/realtek/realtek_main.c#L598
> > 
> > I checked the RTL8211F datasheet and it doesn't say that changes to the
> > "PHY-mode EEE Enable" field would need a write to 0.15 to take effect.
> > But it does say that about "CLKOUT Source".
> > 
> > Curiously, the RTL8211FVD datasheet doesn't suggest that modifying the
> > CLKOUT source needs a soft reset when providing the steps to do so.
> > 
> > Anyway, this code transformation from patch 6/6 is not buggy per se
> > (even if we change the CLKOUT on RTL8211F, we still get the
> > genphy_soft_reset() that we need), but very misleading and confusing.
> > 
> > pw-bot: cr
> > 
> > > For the Marvell PHYs, lots of registers need a soft reset to put
> > > changes into effect. I would not want to hide the soft reset inside a
> > > helper, because of the danger more calls to helps are added
> > > afterwards.
> > 
> > Ok, I get your point and I agree, but what to do?
> 
> If only the clk out that needs it, i would put it in the clock out
> helper.
> 
> Is a soft reset expensive? Is a soft reset destructive? The marvell
> one is both fast and does not seem to change any registers, it just
> activates changes.
> 
> If you think some other registers might need it, i would probably just
> do it unconditionally after all the configuration, assuming it is
> cheap and non-destructive. Maybe add a comment that at least clk out
> needs its, but other registers might need it as well?
> 
>       Andrew
>

With the risk of being unsatisfactory, I can't answer these questions
without completely throwing off eveything else I have scheduled to do.

The patch was delivered by Clark to a customer a number of years ago,
and the customer hooked up the scope to confirm that CLKOUT is disabled.
The datasheet doesn't suggest that genphy_soft_reset() is needed, but
looking at the BSP implementation, I see we did it anyway:
https://github.com/nxp-qoriq/linux/blob/lf-6.6.y/drivers/net/phy/realtek.c#L427

I think the safest thing to do is to keep the genphy_soft_reset() in the
CLKOUT configuration procedure, regardless of PHY version, which is what
I am going to do for v3.