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Message-ID: <78cf90ba-7afd-4ddd-893a-8a3ca8d69147@lunn.ch>
Date: Fri, 14 Nov 2025 23:48:16 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Florian Fainelli <f.fainelli@...il.com>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
Fabio Estevam <festevam@...il.com>,
Russell King - ARM Linux <linux@...linux.org.uk>,
edumazet <edumazet@...gle.com>, netdev <netdev@...r.kernel.org>
Subject: Re: LAN8720: RX errors / packet loss when using smsc PHY driver on
i.MX6Q
> The CRC errors should be a clear sign that you have a serious electrical
> issue here as the MAC is not capable of de-framing what is coming out of the
> PHY properly.
>
> Given that you use RMII this would indicate that your PHY's TX CLK, which is
> a RX CLK on the MAC side may not be stable, do you have a scope you could
> use to check that it looks correct? Anything on the PCB itself that could
> hinder the clock signal quality?
>
> Given that you don't see it at 10Mbits/sec, this would suggest you have an
> issue with data sampling and rise/fall times of the clock being misaligned
> with when the data is present on the data lines.
And Heiner pointed out:
.flags = PHY_RST_AFTER_CLK_EN
So i would see if that has anything to do with it.
Andrew
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