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Message-Id: <E1vQ5F6-0000000GNvt-0nam@rmk-PC.armlinux.org.uk>
Date: Mon, 01 Dec 2025 14:51:08 +0000
From: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>
To: Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Heiko Stuebner <heiko@...ech.de>,
Jakub Kicinski <kuba@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
netdev@...r.kernel.org,
Paolo Abeni <pabeni@...hat.com>
Subject: [PATCH RFC net-next 05/15] net: stmmac: rk: move speed GRF register
offset to private data
Move the speed/clocking related GRF register offset into the driver
private data, convert rk_set_reg_speed() to use it and initialise this
member either from the corresponding member in struct rk_gmac_ops, or
the SoC specific initialisation function.
Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
---
.../net/ethernet/stmicro/stmmac/dwmac-rk.c | 109 ++++++++++++------
1 file changed, 76 insertions(+), 33 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 369792b62c5e..e2c5bfbeadc5 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -50,6 +50,8 @@ struct rk_gmac_ops {
u16 phy_intf_sel_mask;
u16 rmii_mode_mask;
+ u16 speed_grf_reg;
+
bool php_grf_required;
bool regs_valid;
u32 regs[];
@@ -99,6 +101,8 @@ struct rk_priv_data {
u16 phy_intf_sel_grf_reg;
u16 phy_intf_sel_mask;
u16 rmii_mode_mask;
+
+ u16 speed_grf_reg;
};
#define GMAC_CLK_DIV1_125M 0
@@ -128,8 +132,7 @@ static u32 rk_encode_wm16(u16 val, u16 mask)
static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
const struct rk_reg_speed_data *rsd,
- unsigned int reg, phy_interface_t interface,
- int speed)
+ phy_interface_t interface, int speed)
{
unsigned int val;
@@ -165,7 +168,7 @@ static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
return -EINVAL;
}
- regmap_write(bsp_priv->grf, reg, val);
+ regmap_write(bsp_priv->grf, bsp_priv->speed_grf_reg, val);
return 0;
@@ -358,7 +361,7 @@ static int rk3128_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3128_reg_speed_data,
- RK3128_GRF_MAC_CON1, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3128_ops = {
@@ -369,6 +372,8 @@ static const struct rk_gmac_ops rk3128_ops = {
.phy_intf_sel_grf_reg = RK3128_GRF_MAC_CON1,
.phy_intf_sel_mask = GENMASK_U16(8, 6),
.rmii_mode_mask = BIT_U16(14),
+
+ .speed_grf_reg = RK3128_GRF_MAC_CON1,
};
#define RK3228_GRF_MAC_CON0 0x0900
@@ -425,7 +430,7 @@ static int rk3228_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3228_reg_speed_data,
- RK3228_GRF_MAC_CON1, interface, speed);
+ interface, speed);
}
static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv)
@@ -447,6 +452,7 @@ static const struct rk_gmac_ops rk3228_ops = {
.phy_intf_sel_mask = GENMASK_U16(6, 4),
.rmii_mode_mask = BIT_U16(10),
+ .speed_grf_reg = RK3228_GRF_MAC_CON1,
};
#define RK3288_GRF_SOC_CON1 0x0248
@@ -494,7 +500,7 @@ static int rk3288_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3288_reg_speed_data,
- RK3288_GRF_SOC_CON1, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3288_ops = {
@@ -505,6 +511,8 @@ static const struct rk_gmac_ops rk3288_ops = {
.phy_intf_sel_grf_reg = RK3288_GRF_SOC_CON1,
.phy_intf_sel_mask = GENMASK_U16(8, 6),
.rmii_mode_mask = BIT_U16(14),
+
+ .speed_grf_reg = RK3288_GRF_SOC_CON1,
};
#define RK3308_GRF_MAC_CON0 0x04a0
@@ -528,7 +536,7 @@ static int rk3308_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3308_reg_speed_data,
- RK3308_GRF_MAC_CON0, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3308_ops = {
@@ -537,6 +545,8 @@ static const struct rk_gmac_ops rk3308_ops = {
.phy_intf_sel_grf_reg = RK3308_GRF_MAC_CON0,
.phy_intf_sel_mask = GENMASK_U16(4, 2),
+
+ .speed_grf_reg = RK3308_GRF_MAC_CON0,
};
#define RK3328_GRF_MAC_CON0 0x0900
@@ -567,10 +577,12 @@ static int rk3328_init(struct rk_priv_data *bsp_priv)
switch (bsp_priv->id) {
case 0: /* gmac2io */
bsp_priv->phy_intf_sel_grf_reg = RK3328_GRF_MAC_CON1;
+ bsp_priv->speed_grf_reg = RK3328_GRF_MAC_CON1;
return 0;
case 1: /* gmac2phy */
bsp_priv->phy_intf_sel_grf_reg = RK3328_GRF_MAC_CON2;
+ bsp_priv->speed_grf_reg = RK3328_GRF_MAC_CON2;
return 0;
default:
@@ -605,11 +617,7 @@ static const struct rk_reg_speed_data rk3328_reg_speed_data = {
static int rk3328_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
- unsigned int reg;
-
- reg = bsp_priv->id ? RK3328_GRF_MAC_CON2 : RK3328_GRF_MAC_CON1;
-
- return rk_set_reg_speed(bsp_priv, &rk3328_reg_speed_data, reg,
+ return rk_set_reg_speed(bsp_priv, &rk3328_reg_speed_data,
interface, speed);
}
@@ -685,7 +693,7 @@ static int rk3366_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3366_reg_speed_data,
- RK3366_GRF_SOC_CON6, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3366_ops = {
@@ -696,6 +704,8 @@ static const struct rk_gmac_ops rk3366_ops = {
.phy_intf_sel_grf_reg = RK3366_GRF_SOC_CON6,
.phy_intf_sel_mask = GENMASK_U16(11, 9),
.rmii_mode_mask = BIT_U16(6),
+
+ .speed_grf_reg = RK3366_GRF_SOC_CON6,
};
#define RK3368_GRF_SOC_CON15 0x043c
@@ -743,7 +753,7 @@ static int rk3368_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3368_reg_speed_data,
- RK3368_GRF_SOC_CON15, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3368_ops = {
@@ -754,6 +764,8 @@ static const struct rk_gmac_ops rk3368_ops = {
.phy_intf_sel_grf_reg = RK3368_GRF_SOC_CON15,
.phy_intf_sel_mask = GENMASK_U16(11, 9),
.rmii_mode_mask = BIT_U16(6),
+
+ .speed_grf_reg = RK3368_GRF_SOC_CON15,
};
#define RK3399_GRF_SOC_CON5 0xc214
@@ -801,7 +813,7 @@ static int rk3399_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rk3399_reg_speed_data,
- RK3399_GRF_SOC_CON5, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rk3399_ops = {
@@ -812,6 +824,8 @@ static const struct rk_gmac_ops rk3399_ops = {
.phy_intf_sel_grf_reg = RK3399_GRF_SOC_CON5,
.phy_intf_sel_mask = GENMASK_U16(11, 9),
.rmii_mode_mask = BIT_U16(6),
+
+ .speed_grf_reg = RK3399_GRF_SOC_CON5,
};
#define RK3506_GRF_SOC_CON8 0x0020
@@ -828,6 +842,22 @@ static const struct rk_gmac_ops rk3399_ops = {
#define RK3506_GMAC_CLK_RMII_GATE GRF_BIT(2)
#define RK3506_GMAC_CLK_RMII_NOGATE GRF_CLR_BIT(2)
+static int rk3506_init(struct rk_priv_data *bsp_priv)
+{
+ switch (bsp_priv->id) {
+ case 0:
+ bsp_priv->speed_grf_reg = RK3506_GRF_SOC_CON8;
+ return 0;
+
+ case 1:
+ bsp_priv->speed_grf_reg = RK3506_GRF_SOC_CON11;
+ return 0;
+
+ default:
+ return -EINVAL;
+ }
+}
+
static void rk3506_set_to_rmii(struct rk_priv_data *bsp_priv)
{
unsigned int id = bsp_priv->id, offset;
@@ -844,11 +874,8 @@ static const struct rk_reg_speed_data rk3506_reg_speed_data = {
static int rk3506_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
- unsigned int id = bsp_priv->id, offset;
-
- offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
return rk_set_reg_speed(bsp_priv, &rk3506_reg_speed_data,
- offset, interface, speed);
+ interface, speed);
}
static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
@@ -866,6 +893,7 @@ static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
}
static const struct rk_gmac_ops rk3506_ops = {
+ .init = rk3506_init,
.set_to_rmii = rk3506_set_to_rmii,
.set_speed = rk3506_set_speed,
.set_clock_selection = rk3506_set_clock_selection,
@@ -910,6 +938,22 @@ static const struct rk_gmac_ops rk3506_ops = {
#define RK3528_GMAC1_CLK_RMII_GATE GRF_BIT(9)
#define RK3528_GMAC1_CLK_RMII_NOGATE GRF_CLR_BIT(9)
+static int rk3528_init(struct rk_priv_data *bsp_priv)
+{
+ switch (bsp_priv->id) {
+ case 0:
+ bsp_priv->speed_grf_reg = RK3528_VO_GRF_GMAC_CON;
+ return 0;
+
+ case 1:
+ bsp_priv->speed_grf_reg = RK3528_VPU_GRF_GMAC_CON5;
+ return 0;
+
+ default:
+ return -EINVAL;
+ }
+}
+
static void rk3528_set_to_rgmii(struct rk_priv_data *bsp_priv,
int tx_delay, int rx_delay)
{
@@ -952,17 +996,13 @@ static int rk3528_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
const struct rk_reg_speed_data *rsd;
- unsigned int reg;
- if (bsp_priv->id == 1) {
+ if (bsp_priv->id == 1)
rsd = &rk3528_gmac1_reg_speed_data;
- reg = RK3528_VPU_GRF_GMAC_CON5;
- } else {
+ else
rsd = &rk3528_gmac0_reg_speed_data;
- reg = RK3528_VO_GRF_GMAC_CON;
- }
- return rk_set_reg_speed(bsp_priv, rsd, reg, interface, speed);
+ return rk_set_reg_speed(bsp_priv, rsd, interface, speed);
}
static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv,
@@ -994,6 +1034,7 @@ static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv)
}
static const struct rk_gmac_ops rk3528_ops = {
+ .init = rk3528_init,
.set_to_rgmii = rk3528_set_to_rgmii,
.set_to_rmii = rk3528_set_to_rmii,
.set_speed = rk3528_set_speed,
@@ -1114,10 +1155,12 @@ static int rk3576_init(struct rk_priv_data *bsp_priv)
switch (bsp_priv->id) {
case 0:
bsp_priv->phy_intf_sel_grf_reg = RK3576_GRF_GMAC_CON0;
+ bsp_priv->speed_grf_reg = RK3576_GRF_GMAC_CON0;
return 0;
case 1:
bsp_priv->phy_intf_sel_grf_reg = RK3576_GRF_GMAC_CON1;
+ bsp_priv->speed_grf_reg = RK3576_GRF_GMAC_CON1;
return 0;
default:
@@ -1163,12 +1206,7 @@ static const struct rk_reg_speed_data rk3578_reg_speed_data = {
static int rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
- unsigned int offset_con;
-
- offset_con = bsp_priv->id == 1 ? RK3576_GRF_GMAC_CON1 :
- RK3576_GRF_GMAC_CON0;
-
- return rk_set_reg_speed(bsp_priv, &rk3578_reg_speed_data, offset_con,
+ return rk_set_reg_speed(bsp_priv, &rk3578_reg_speed_data,
interface, speed);
}
@@ -1368,7 +1406,7 @@ static int rv1108_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{
return rk_set_reg_speed(bsp_priv, &rv1108_reg_speed_data,
- RV1108_GRF_GMAC_CON0, interface, speed);
+ interface, speed);
}
static const struct rk_gmac_ops rv1108_ops = {
@@ -1377,6 +1415,8 @@ static const struct rk_gmac_ops rv1108_ops = {
.phy_intf_sel_grf_reg = RV1108_GRF_GMAC_CON0,
.phy_intf_sel_mask = GENMASK_U16(6, 4),
+
+ .speed_grf_reg = RV1108_GRF_GMAC_CON0,
};
#define RV1126_GRF_GMAC_CON0 0X0070
@@ -1656,6 +1696,9 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
bsp_priv->phy_intf_sel_mask = ops->phy_intf_sel_mask;
bsp_priv->rmii_mode_mask = ops->rmii_mode_mask;
+ /* Set the default speed related parameters */
+ bsp_priv->speed_grf_reg = ops->speed_grf_reg;
+
if (ops->init) {
ret = ops->init(bsp_priv);
if (ret) {
--
2.47.3
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