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Message-ID: <20251203094224.jelvaizfq7h6jzke@skbuf>
Date: Wed, 3 Dec 2025 11:42:24 +0200
From: Vladimir Oltean <vladimir.oltean@....com>
To: Marek Vasut <marek.vasut@...lbox.org>,
Ivan Galkin <ivan.galkin@...s.com>
Cc: netdev@...r.kernel.org, "David S. Miller" <davem@...emloft.net>,
Aleksander Jan Bajkowski <olek2@...pl>,
Andrew Lunn <andrew@...n.ch>, Conor Dooley <conor+dt@...nel.org>,
Eric Dumazet <edumazet@...gle.com>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Jakub Kicinski <kuba@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Michael Klein <michael@...sekall.de>,
Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>,
Russell King <linux@...linux.org.uk>, devicetree@...r.kernel.org
Subject: Re: [net-next,PATCH 3/3] net: phy: realtek: Add property to enable
SSC
On Sun, Nov 30, 2025 at 01:58:34AM +0100, Marek Vasut wrote:
> Add support for spread spectrum clocking (SSC) on RTL8211F(D)(I)-CG,
> RTL8211FS(I)(-VS)-CG, RTL8211FG(I)(-VS)-CG PHYs. The implementation
> follows EMI improvement application note Rev. 1.2 for these PHYs.
>
> The current implementation enables SSC for both RXC and SYSCLK clock
> signals. Introduce new DT property 'realtek,ssc-enable' to enable the
> SSC mode.
>
> Signed-off-by: Marek Vasut <marek.vasut@...lbox.org>
> ---
> Cc: "David S. Miller" <davem@...emloft.net>
> Cc: Aleksander Jan Bajkowski <olek2@...pl>
> Cc: Andrew Lunn <andrew@...n.ch>
> Cc: Conor Dooley <conor+dt@...nel.org>
> Cc: Eric Dumazet <edumazet@...gle.com>
> Cc: Florian Fainelli <f.fainelli@...il.com>
> Cc: Heiner Kallweit <hkallweit1@...il.com>
> Cc: Jakub Kicinski <kuba@...nel.org>
> Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>
> Cc: Michael Klein <michael@...sekall.de>
> Cc: Paolo Abeni <pabeni@...hat.com>
> Cc: Rob Herring <robh@...nel.org>
> Cc: Russell King <linux@...linux.org.uk>
> Cc: Vladimir Oltean <vladimir.oltean@....com>
> Cc: devicetree@...r.kernel.org
> Cc: netdev@...r.kernel.org
> ---
> drivers/net/phy/realtek/realtek_main.c | 47 ++++++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
>
> diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
> index 67ecf3d4af2b1..b1b48936d6422 100644
> --- a/drivers/net/phy/realtek/realtek_main.c
> +++ b/drivers/net/phy/realtek/realtek_main.c
> @@ -74,11 +74,17 @@
>
> #define RTL8211F_PHYCR2 0x19
> #define RTL8211F_CLKOUT_EN BIT(0)
> +#define RTL8211F_SYSCLK_SSC_EN BIT(3)
> #define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5)
>
> #define RTL8211F_INSR_PAGE 0xa43
> #define RTL8211F_INSR 0x1d
>
> +/* RTL8211F SSC settings */
> +#define RTL8211F_SSC_PAGE 0xc44
> +#define RTL8211F_SSC_RXC 0x13
> +#define RTL8211F_SSC_SYSCLK 0x17
> +
> /* RTL8211F LED configuration */
> #define RTL8211F_LEDCR_PAGE 0xd04
> #define RTL8211F_LEDCR 0x10
> @@ -203,6 +209,7 @@ MODULE_LICENSE("GPL");
> struct rtl821x_priv {
> bool enable_aldps;
> bool disable_clk_out;
> + bool enable_ssc;
> struct clk *clk;
> /* rtl8211f */
> u16 iner;
> @@ -266,6 +273,8 @@ static int rtl821x_probe(struct phy_device *phydev)
> "realtek,aldps-enable");
> priv->disable_clk_out = of_property_read_bool(dev->of_node,
> "realtek,clkout-disable");
> + priv->enable_ssc = of_property_read_bool(dev->of_node,
> + "realtek,ssc-enable");
>
> phydev->priv = priv;
>
> @@ -700,6 +709,37 @@ static int rtl8211f_config_phy_eee(struct phy_device *phydev)
> RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
> }
>
> +static int rtl8211f_config_ssc(struct phy_device *phydev)
> +{
> + struct rtl821x_priv *priv = phydev->priv;
> + struct device *dev = &phydev->mdio.dev;
> + int ret;
> +
> + /* The value is preserved if the device tree property is absent */
> + if (!priv->enable_ssc)
> + return 0;
> +
> + /* RTL8211FVD has no PHYCR2 register */
> + if (phydev->drv->phy_id == RTL_8211FVD_PHYID)
> + return 0;
Ivan, do your conversations with Realtek support suggest that the VFD
PHY variant also supports the spread spectrum clock bits configured here
in RTL8211F_PHYCR2?
> +
> + ret = phy_write_paged(phydev, RTL8211F_SSC_PAGE, RTL8211F_SSC_RXC, 0x5f00);
> + if (ret < 0) {
> + dev_err(dev, "RXC SCC configuration failed: %pe\n", ERR_PTR(ret));
> + return ret;
> + }
I'm going to show a bit of lack of knowledge, but I'm thinking in the context
of stmmac (user of phylink_config :: mac_requires_rxc), which I don't exactly
know what it requires it for. Does it use the RGMII RXC as a system clock?
If so, I guess intentionally introducing jitter (via the spread spectrum
feature) would be disastrous for it. In that case we should seriously consider
separating the "spread spectrum for CLKOUT" and "spread spectrum for RGMII"
device tree control properties.
> +
> + ret = phy_write_paged(phydev, RTL8211F_SSC_PAGE, RTL8211F_SSC_SYSCLK, 0x4f00);
> + if (ret < 0) {
> + dev_err(dev, "SYSCLK SCC configuration failed: %pe\n", ERR_PTR(ret));
> + return ret;
> + }
> +
> + /* Enable SSC */
> + return phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2,
> + RTL8211F_SYSCLK_SSC_EN, RTL8211F_SYSCLK_SSC_EN);
> +}
> +
> static int rtl8211f_config_init(struct phy_device *phydev)
> {
> struct device *dev = &phydev->mdio.dev;
> @@ -723,6 +763,13 @@ static int rtl8211f_config_init(struct phy_device *phydev)
> return ret;
> }
>
> + ret = rtl8211f_config_ssc(phydev);
> + if (ret) {
> + dev_err(dev, "SSC mode configuration failed: %pe\n",
> + ERR_PTR(ret));
> + return ret;
> + }
> +
> return rtl8211f_config_phy_eee(phydev);
> }
>
> --
> 2.51.0
>
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