netdev - Re: [PATCH RFC] powerpc: switch two fixed phy links to full duplex

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Message-ID: <10441fbd-8022-402e-8551-e0f8ec0449f0@gmail.com>
Date: Fri, 5 Dec 2025 22:16:42 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Madhavan Srinivasan
 <maddy@...ux.ibm.com>, Michael Ellerman <mpe@...erman.id.au>,
 Nicholas Piggin <npiggin@...il.com>,
 Christophe Leroy <christophe.leroy@...roup.eu>,
 Pantelis Antoniou <pantelis.antoniou@...il.com>,
 "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
 "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
 "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH RFC] powerpc: switch two fixed phy links to full duplex

On 12/5/2025 6:50 PM, Andrew Lunn wrote:
> On Fri, Dec 05, 2025 at 06:21:50PM +0100, Heiner Kallweit wrote:
>> These two fixed links are the only ones in-kernel specifying half duplex.
>> If these could be switched to full duplex, then half duplex handling
>> could be removed from phylib fixed phy, phylink, swphy.
>>
>> The SoC MAC's are capable of full duplex, fs_enet MAC driver is as well.
>> Anything that would keep us from switching to full duplex?
> 
> What do we know about the device on the other end of the link? Maybe
> that is what is limiting it to 10Half?
> 
I found no hint that anything is connected to this ethernet port on
the two boards. Hard to find any information because the boards are
>15yrs old. Seems this are dummy entries, just to let fs_enet load.

> 	Andrew

Heiner