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Message-ID: <20251215163820.1584926-2-robert.marko@sartura.hr>
Date: Mon, 15 Dec 2025 17:35:19 +0100
From: Robert Marko <robert.marko@...tura.hr>
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Cc: luka.perkov@...tura.hr,
Robert Marko <robert.marko@...tura.hr>
Subject: [PATCH v2 02/19] dt-bindings: usb: Add Microchip LAN969x support
Microchip LAN969x has DWC3 compatible controller, though limited to 2.0(HS)
speed, so document it.
Signed-off-by: Robert Marko <robert.marko@...tura.hr>
---
Changes in v2:
* Fix example indentation
.../bindings/usb/microchip,lan9691-dwc3.yaml | 68 +++++++++++++++++++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml b/Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml
new file mode 100644
index 000000000000..6b49ef0a6bdd
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/microchip,lan9691-dwc3.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/microchip,lan9691-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip LAN969x SuperSpeed DWC3 USB SoC controller
+
+maintainers:
+ - Robert Marko <robert.marko@...tura.hr>
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,lan9691-dwc3
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - microchip,lan9691-dwc3
+ - const: snps,dwc3
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Gated USB DRD clock
+ - description: Controller reference clock
+
+ clock-names:
+ items:
+ - const: bus_early
+ - const: ref
+
+unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+allOf:
+ - $ref: snps,dwc3.yaml#
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/microchip,lan9691.h>
+
+ usb@...000 {
+ compatible = "microchip,lan9691-dwc3", "snps,dwc3";
+ reg = <0x300000 0x80000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks GCK_GATE_USB_DRD>,
+ <&clks GCK_ID_USB_REFCLK>;
+ clock-names = "bus_early", "ref";
+ };
--
2.52.0
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