netdev - Re: [Intel-wired-lan] [PATCH iwl-net v3] igc: Restore default Qbv schedule when changing channels

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Message-ID: <c08ea6dd-89e1-4c7b-bcd5-732330c26081@intel.com>
Date: Mon, 29 Dec 2025 16:50:19 +0200
From: Avigail Dahan <Avigailx.dahan@...el.com>
To: Kurt Kanzenbach <kurt@...utronix.de>, Tony Nguyen
	<anthony.l.nguyen@...el.com>, Przemek Kitszel <przemyslaw.kitszel@...el.com>
CC: Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller"
	<davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski
	<kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Sebastian Andrzej Siewior
	<bigeasy@...utronix.de>, Vinicius Costa Gomes <vinicius.gomes@...el.com>,
	"Loktionov, Aleksandr" <aleksandr.loktionov@...el.com>,
	<intel-wired-lan@...ts.osuosl.org>, <netdev@...r.kernel.org>
Subject: Re: [Intel-wired-lan] [PATCH iwl-net v3] igc: Restore default Qbv
 schedule when changing channels



On 20/11/2025 10:18, Kurt Kanzenbach wrote:
> The Multi-queue Priority (MQPRIO) and Earliest TxTime First (ETF) offloads
> utilize the Time Sensitive Networking (TSN) Tx mode. This mode is always
> coupled to IEEE 802.1Qbv time aware shaper (Qbv). Therefore, the driver
> sets a default Qbv schedule of all gates opened and a cycle time of
> 1s. This schedule is set during probe.
> 
> However, the following sequence of events lead to Tx issues:
> 
>   - Boot a dual core system
>     igc_probe():
>       igc_tsn_clear_schedule():
>         -> Default Schedule is set
>         Note: At this point the driver has allocated two Tx/Rx queues, because
>         there are only two CPUs.
> 
>   - ethtool -L enp3s0 combined 4
>     igc_ethtool_set_channels():
>       igc_reinit_queues()
>         -> Default schedule is gone, per Tx ring start and end time are zero
> 
>    - tc qdisc replace dev enp3s0 handle 100 parent root mqprio \
>        num_tc 4 map 3 3 2 2 0 1 1 1 3 3 3 3 3 3 3 3 \
>        queues 1@0 1@1 1@2 1@3 hw 1
>      igc_tsn_offload_apply():
>        igc_tsn_enable_offload():
>          -> Writes zeros to IGC_STQT(i) and IGC_ENDQT(i), causing Tx to stall/fail
> 
> Therefore, restore the default Qbv schedule after changing the number of
> channels.
> 
> Furthermore, add a restriction to not allow queue reconfiguration when
> TSN/Qbv is enabled, because it may lead to inconsistent states.
> 
> Fixes: c814a2d2d48f ("igc: Use default cycle 'start' and 'end' values for queues")
> Signed-off-by: Kurt Kanzenbach <kurt@...utronix.de>
> ---
> Changes in v3:
> - Adjust commit message and comments (Aleksandr)
> - Link to v2: https://lore.kernel.org/r/20251118-igc_mqprio_channels-v2-1-c32563dede2f@linutronix.de
> 
> Changes in v2:
> - Explain abbreviations (Aleksandr)
> - Only clear schedule if no error happened (Aleksandr)
> - Add restriction to avoid inconsistent states (Vinicius)
> - Target net tree (Vinicius)
> - Link to v1: https://lore.kernel.org/r/20251107-igc_mqprio_channels-v1-1-42415562d0f8@linutronix.de
> ---
>   drivers/net/ethernet/intel/igc/igc_ethtool.c | 4 ++--
>   drivers/net/ethernet/intel/igc/igc_main.c    | 5 +++++
>   2 files changed, 7 insertions(+), 2 deletions(-)
> 

Tested-by: Avigail Dahan <avigailx.dahan@...el.com>