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Message-ID: <fa9657f8-ec42-4476-bf4c-37db7b58ecac@gmail.com>
Date: Fri, 9 Jan 2026 08:36:10 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Andrew Lunn <andrew@...n.ch>, Andrew Lunn <andrew+netdev@...n.ch>,
Russell King - ARM Linux <linux@...linux.org.uk>,
Paolo Abeni <pabeni@...hat.com>, Eric Dumazet <edumazet@...gle.com>,
David Miller <davem@...emloft.net>, Jakub Kicinski <kuba@...nel.org>,
Vladimir Oltean <vladimir.oltean@....com>,
Michael Klein <michael@...sekall.de>,
Realtek linux nic maintainers <nic_swsd@...ltek.com>,
Aleksander Jan Bajkowski <olek2@...pl>,
Fabio Baltieri <fabio.baltieri@...il.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH net-next 1/2] net: phy: realtek: add PHY driver for
RTL8127ATF
On 1/8/2026 11:56 PM, Daniel Golle wrote:
> On Thu, Jan 08, 2026 at 09:27:06PM +0100, Heiner Kallweit wrote:
>> RTL8127ATF supports a SFP+ port for fiber modules (10GBASE-SR/LR/ER/ZR and
>> DAC). The list of supported modes was provided by Realtek. According to the
>> r8127 vendor driver also 1G modules are supported, but this needs some more
>> complexity in the driver, and only 10G mode has been tested so far.
>> Therefore mainline support will be limited to 10G for now.
>> The SFP port signals are hidden in the chip IP and driven by firmware.
>> Therefore mainline SFP support can't be used here.
>> This PHY driver is used by the RTL8127ATF support in r8169.
>> RTL8127ATF reports the same PHY ID as the TP version. Therefore use a dummy
>> PHY ID. This PHY driver is used by the RTL8127ATF support in r8169.
>>
>> Signed-off-by: Heiner Kallweit <hkallweit1@...il.com>
>> ---
>> MAINTAINERS | 1 +
>> drivers/net/phy/realtek/realtek_main.c | 54 ++++++++++++++++++++++++++
>> include/linux/realtek_phy.h | 7 ++++
>> 3 files changed, 62 insertions(+)
>> create mode 100644 include/linux/realtek_phy.h
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 765ad2daa21..6ede656b009 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -9416,6 +9416,7 @@ F: include/linux/phy_link_topology.h
>> F: include/linux/phylib_stubs.h
>> F: include/linux/platform_data/mdio-bcm-unimac.h
>> F: include/linux/platform_data/mdio-gpio.h
>> +F: include/linux/realtek_phy.h
>> F: include/trace/events/mdio.h
>> F: include/uapi/linux/mdio.h
>> F: include/uapi/linux/mii.h
>> diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
>> index eb5b540ada0..b57ef0ce15a 100644
>> --- a/drivers/net/phy/realtek/realtek_main.c
>> +++ b/drivers/net/phy/realtek/realtek_main.c
>> @@ -16,6 +16,7 @@
>> #include <linux/module.h>
>> #include <linux/delay.h>
>> #include <linux/clk.h>
>> +#include <linux/realtek_phy.h>
>> #include <linux/string_choices.h>
>>
>> #include "../phylib.h"
>> @@ -2100,6 +2101,45 @@ static irqreturn_t rtl8221b_handle_interrupt(struct phy_device *phydev)
>> return IRQ_HANDLED;
>> }
>>
>> +static int rtlgen_sfp_get_features(struct phy_device *phydev)
>> +{
>> + linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
>> + phydev->supported);
>> +
>> + /* set default mode */
>> + phydev->speed = SPEED_10000;
>> + phydev->duplex = DUPLEX_FULL;
>> +
>> + phydev->port = PORT_FIBRE;
>> +
>> + return 0;
>> +}
>> +
>> +static int rtlgen_sfp_read_status(struct phy_device *phydev)
>> +{
>> + int val, err;
>> +
>> + err = genphy_update_link(phydev);
>> + if (err)
>> + return err;
>> +
>> + if (!phydev->link)
>> + return 0;
>> +
>> + val = rtlgen_read_vend2(phydev, RTL_VND2_PHYSR);
>
> This should be the same as
> phy_read(phydev, MII_RESV2); /* on page 0 */
> Please try.
>
In case of an integrated PHY a phy_read() effectively is translated
into a rtlgen_read_vend2(). So technically there's no benefit.
I don't have hw with RTL8127ATF, but maybe Fabio can test.
>
>> + if (val < 0)
>> + return val;
>> +
>> + rtlgen_decode_physr(phydev, val);
>> +
>> + return 0;
>> +}
>> +
>> +static int rtlgen_sfp_config_aneg(struct phy_device *phydev)
>> +{
>> + return 0;
>> +}
>> +
>> static struct phy_driver realtek_drvs[] = {
>> {
>> PHY_ID_MATCH_EXACT(0x00008201),
>> @@ -2361,6 +2401,20 @@ static struct phy_driver realtek_drvs[] = {
>> .write_page = rtl821x_write_page,
>> .read_mmd = rtl822x_read_mmd,
>> .write_mmd = rtl822x_write_mmd,
>> + }, {
>> + PHY_ID_MATCH_EXACT(PHY_ID_RTL_DUMMY_SFP),
>> + .name = "Realtek SFP PHY Mode",
>> + .flags = PHY_IS_INTERNAL,
>> + .probe = rtl822x_probe,
>> + .get_features = rtlgen_sfp_get_features,
>> + .config_aneg = rtlgen_sfp_config_aneg,
>> + .read_status = rtlgen_sfp_read_status,
>> + .suspend = genphy_suspend,
>> + .resume = rtlgen_resume,
>> + .read_page = rtl821x_read_page,
>> + .write_page = rtl821x_write_page,
>> + .read_mmd = rtl822x_read_mmd,
>> + .write_mmd = rtl822x_write_mmd,
>> }, {
>> PHY_ID_MATCH_EXACT(0x001ccad0),
>> .name = "RTL8224 2.5Gbps PHY",
>> diff --git a/include/linux/realtek_phy.h b/include/linux/realtek_phy.h
>> new file mode 100644
>> index 00000000000..d683bc1b065
>> --- /dev/null
>> +++ b/include/linux/realtek_phy.h
>> @@ -0,0 +1,7 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +#ifndef _REALTEK_PHY_H
>> +#define _REALTEK_PHY_H
>> +
>> +#define PHY_ID_RTL_DUMMY_SFP 0x001ccbff
>> +
>> +#endif /* _REALTEK_PHY_H */
>> --
>> 2.52.0
>>
>>
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