netdev - Re: [PATCH net-next 3/3] net: dsa: mxl-gsw1xx: add support for Intel GSW150

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Message-ID: <20260114223848.4s6r4ncuzstq6e4e@skbuf>
Date: Thu, 15 Jan 2026 00:38:48 +0200
From: Vladimir Oltean <olteanv@...il.com>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Hauke Mehrtens <hauke@...ke-m.de>, Andrew Lunn <andrew@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	Chen Minqiang <ptpt52@...il.com>,
	Xinfa Deng <xinfa.deng@...inet.com>
Subject: Re: [PATCH net-next 3/3] net: dsa: mxl-gsw1xx: add support for Intel
 GSW150

On Tue, Jan 13, 2026 at 03:25:34AM +0000, Daniel Golle wrote:
> Add support for the Intel GSW150 (aka. Lantiq PEB7084) switch IC to
> the mxl-gsw1xx driver. This switch comes with 5 Gigabit Ethernet
> copper ports (Intel XWAY PHY11G (xRX v1.2 integrated) PHYs) as well as
> one GMII/RGMII and one RGMII port.
> 
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
>  drivers/net/dsa/lantiq/mxl-gsw1xx.c | 63 ++++++++++++++++++++++++++---
>  drivers/net/dsa/lantiq/mxl-gsw1xx.h |  2 +
>  2 files changed, 60 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.c b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> index 4390c2df2e4bd..1c6a5456a5caf 100644
> --- a/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> +++ b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> +static void gsw150_phylink_get_caps(struct dsa_switch *ds, int port,
> +				    struct phylink_config *config)
> +{
> +	config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
> +				   MAC_10 | MAC_100 | MAC_1000;
> +
> +	switch (port) {
> +	case 0: /* port 0~4: built-in 1GE PHYs */
> +	case 1:
> +	case 2:
> +	case 3:
> +	case 4:

I think there's a syntax for this, see mt7530_mac_port_get_caps():

	case 0 ... 4:

also, you can drop "port X: " from the comments.

> +		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
> +			  config->supported_interfaces);
> +		break;
> +	case 5: /* port 5: GMII or RGMII */
> +		__set_bit(PHY_INTERFACE_MODE_GMII,
> +			  config->supported_interfaces);
> +		fallthrough;
> +	case 6: /* port 6: RGMII */
> +		phy_interface_set_rgmii(config->supported_interfaces);
> +		break;
> +	}
> +
> +	gsw1xx_phylink_get_lpi_caps(config);
>  }