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Message-ID: <366b3ffc-c88a-4b04-baa5-a05725f1d01f@gmail.com>
Date: Thu, 15 Jan 2026 21:15:32 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: Paolo Abeni <pabeni@...hat.com>, javen <javen_xu@...lsil.com.cn>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
nic_swsd@...ltek.com, andrew+netdev@...n.ch, davem@...emloft.net,
edumazet@...gle.com, kuba@...nel.org, horms@...nel.org
Subject: Re: [PATCH net-next v1 3/3] r8169: add support for chip RTL9151AS
On 1/15/2026 11:51 AM, Paolo Abeni wrote:
> On 1/12/26 11:20 PM, Heiner Kallweit wrote:
>> On 1/12/2026 3:45 AM, javen wrote:
>>> From: Javen Xu <javen_xu@...lsil.com.cn>
>>>
>>> This patch adds support for chip RTL9151AS. Since lacking of Hardware
>>> version IDs, we use TX_CONFIG_V2 to recognize RTL9151AS and coming chips.
>>> rtl_chip_infos_extend is used to store IC information for RTL9151AS and
>>> coming chips. The TxConfig value between RTL9151AS and RTL9151A is
>>>
>>> different.
>>>
>>> Signed-off-by: Javen Xu <javen_xu@...lsil.com.cn>
>>> ---
>>> drivers/net/ethernet/realtek/r8169.h | 3 ++-
>>> drivers/net/ethernet/realtek/r8169_main.c | 28 +++++++++++++++++++++--
>>> 2 files changed, 28 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/net/ethernet/realtek/r8169.h b/drivers/net/ethernet/realtek/r8169.h
>>> index 2c1a0c21af8d..f66c279cbee6 100644
>>> --- a/drivers/net/ethernet/realtek/r8169.h
>>> +++ b/drivers/net/ethernet/realtek/r8169.h
>>> @@ -72,7 +72,8 @@ enum mac_version {
>>> RTL_GIGA_MAC_VER_70,
>>> RTL_GIGA_MAC_VER_80,
>>> RTL_GIGA_MAC_NONE,
>>> - RTL_GIGA_MAC_VER_LAST = RTL_GIGA_MAC_NONE - 1
>>> + RTL_GIGA_MAC_VER_LAST = RTL_GIGA_MAC_NONE - 1,
>>> + RTL_GIGA_MAC_VER_CHECK_EXTEND
>>> };
>>>
>>> struct rtl8169_private;
>>> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
>>> index 9b89bbf67198..164ad6570059 100644
>>> --- a/drivers/net/ethernet/realtek/r8169_main.c
>>> +++ b/drivers/net/ethernet/realtek/r8169_main.c
>>> @@ -95,8 +95,8 @@
>>> #define JUMBO_16K (SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)
>>>
>>> static const struct rtl_chip_info {
>>> - u16 mask;
>>> - u16 val;
>>> + u32 mask;
>>> + u32 val;
>>> enum mac_version mac_version;
>>> const char *name;
>>> const char *fw_name;
>>> @@ -205,10 +205,20 @@ static const struct rtl_chip_info {
>>> { 0xfc8, 0x040, RTL_GIGA_MAC_VER_03, "RTL8110s" },
>>> { 0xfc8, 0x008, RTL_GIGA_MAC_VER_02, "RTL8169s" },
>>>
>>> + /* extend chip version*/
>>> + { 0x7cf, 0x7c8, RTL_GIGA_MAC_VER_CHECK_EXTEND },
>>> +
>>> /* Catch-all */
>>> { 0x000, 0x000, RTL_GIGA_MAC_NONE }
>>> };
>>>
>>> +static const struct rtl_chip_info rtl_chip_infos_extend[] = {
>>> + { 0x7fffffff, 0x00000000, RTL_GIGA_MAC_VER_64, "RTL9151AS", FIRMWARE_9151A_1},
>>> +
>>
>> Seems all bits except bit 31 are used for chip detection. However register is
>> named TX_CONFIG_V2, even though only bit 31 is left for actual tx configuration.
>> Is the register name misleading, or is the mask incorrect?
>
> @Heiner (double checking to avoid more confusion on my side): are you
> fine with the register name? It's unclear to me if you are fine with
> just the 2 merged patches or even with this one.
>
I understand their motivation for the register name, even though I don't find it ideal.
But if their datasheet calls it like this, then ok.
So yes, patch is fine with me.
> Thanks,
>
> Paolo
>
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