netdev - [PATCH net-next v2 01/12] dt-bindings: dpll: support acting as pin provider

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Message-ID: <20260116184610.147591-2-ivecera@redhat.com>
Date: Fri, 16 Jan 2026 19:45:59 +0100
From: Ivan Vecera <ivecera@...hat.com>
To: netdev@...r.kernel.org
Cc: Alexander Lobakin <aleksander.lobakin@...el.com>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
	Conor Dooley <conor+dt@...nel.org>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Grzegorz Nitka <grzegorz.nitka@...el.com>,
	Jakub Kicinski <kuba@...nel.org>,
	Jiri Pirko <jiri@...nulli.us>,
	Jonathan Lemon <jonathan.lemon@...il.com>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Leon Romanovsky <leon@...nel.org>,
	Mark Bloch <mbloch@...dia.com>,
	Michal Schmidt <mschmidt@...hat.com>,
	Paolo Abeni <pabeni@...hat.com>,
	Petr Oros <poros@...hat.com>,
	Prathosh Satish <Prathosh.Satish@...rochip.com>,
	Przemek Kitszel <przemyslaw.kitszel@...el.com>,
	Richard Cochran <richardcochran@...il.com>,
	Rob Herring <robh@...nel.org>,
	Saeed Mahameed <saeedm@...dia.com>,
	Saravana Kannan <saravanak@...nel.org>,
	Tariq Toukan <tariqt@...dia.com>,
	Tony Nguyen <anthony.l.nguyen@...el.com>,
	Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
	devicetree@...r.kernel.org,
	intel-wired-lan@...ts.osuosl.org,
	linux-kernel@...r.kernel.org,
	linux-rdma@...r.kernel.org
Subject: [PATCH net-next v2 01/12] dt-bindings: dpll: support acting as pin provider

Enable DPLL devices to act as pin providers for consumers (such as
Ethernet controllers or PHYs).

Add the '#dpll-pin-cells' property to the generic dpll-device.yaml
schema and mark it as required. This allows DPLL nodes to define pin
specifiers for their connected consumers.

Introduce a new header '<dt-bindings/dpll/dpll.h>' to define pin
direction macros (`DPLL_PIN_INPUT` and `DPLL_PIN_OUTPUT`). These macros
are intended to be used in the DT pin specifiers (inside 'dpll-pins'
properties of consumers) to describe the direction of the signal.

Update the 'microchip,zl30731.yaml' examples to include the new
'#dpll-pin-cells' property.

The core schema definitions for these properties are being added to
dt-schema in PR #183.

Link: https://github.com/devicetree-org/dt-schema/pull/183
Signed-off-by: Ivan Vecera <ivecera@...hat.com>
---
v2:
* removed dpll-pin-consumer.yaml schema per request
* added '#dpll-pin-cells' property into dpll-device.yaml and
  microchip,zl30731.yaml
---
 .../devicetree/bindings/dpll/dpll-device.yaml       | 10 ++++++++++
 .../devicetree/bindings/dpll/microchip,zl30731.yaml |  4 ++++
 MAINTAINERS                                         |  1 +
 include/dt-bindings/dpll/dpll.h                     | 13 +++++++++++++
 4 files changed, 28 insertions(+)
 create mode 100644 include/dt-bindings/dpll/dpll.h

diff --git a/Documentation/devicetree/bindings/dpll/dpll-device.yaml b/Documentation/devicetree/bindings/dpll/dpll-device.yaml
index fb8d7a9a3693f..5022cbd77f308 100644
--- a/Documentation/devicetree/bindings/dpll/dpll-device.yaml
+++ b/Documentation/devicetree/bindings/dpll/dpll-device.yaml
@@ -27,6 +27,13 @@ properties:
   "#size-cells":
     const: 0
 
+  "#dpll-pin-cells":
+    const: 2
+    description: |
+      - Specified pin index
+      - Specified pin direction. The macros are defined in
+        dt-bindings/dpll/dpll.h
+
   dpll-types:
     description: List of DPLL channel types, one per DPLL instance.
     $ref: /schemas/types.yaml#/definitions/non-unique-string-array
@@ -73,4 +80,7 @@ properties:
       - "#address-cells"
       - "#size-cells"
 
+required:
+  - "#dpll-pin-cells"
+
 additionalProperties: true
diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
index 17747f754b845..6693151af6ccb 100644
--- a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
+++ b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
@@ -44,6 +44,8 @@ examples:
       #size-cells = <0>;
 
       dpll@70 {
+        #dpll-pin-cells = <2>;
+
         compatible = "microchip,zl30732";
         reg = <0x70>;
         dpll-types = "pps", "eec";
@@ -80,6 +82,8 @@ examples:
       #size-cells = <0>;
 
       dpll@70 {
+        #dpll-pin-cells = <2>;
+
         compatible = "microchip,zl30731";
         reg = <0x70>;
         spi-max-frequency = <12500000>;
diff --git a/MAINTAINERS b/MAINTAINERS
index afc71089ba09f..d359d42f64223 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7655,6 +7655,7 @@ F:	Documentation/devicetree/bindings/dpll/dpll-device.yaml
 F:	Documentation/devicetree/bindings/dpll/dpll-pin.yaml
 F:	Documentation/driver-api/dpll.rst
 F:	drivers/dpll/
+F:	include/dt-bindings/dpll/dpll.h
 F:	include/linux/dpll.h
 F:	include/uapi/linux/dpll.h
 
diff --git a/include/dt-bindings/dpll/dpll.h b/include/dt-bindings/dpll/dpll.h
new file mode 100644
index 0000000000000..5fc9815800fc0
--- /dev/null
+++ b/include/dt-bindings/dpll/dpll.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
+/*
+ * This header provides constants for DPLL bindings.
+ */
+
+#ifndef _DT_BINDINGS_DPLL_DPLL_H
+#define _DT_BINDINGS_DPLL_DPLL_H
+
+/* DPLL pin direction */
+#define DPLL_PIN_INPUT 0
+#define DPLL_PIN_OUTPUT 1
+
+#endif
-- 
2.52.0