netdev - Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control

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Message-ID: <59cec617-0189-4dc3-bc3f-6346155a62ae@lunn.ch>
Date: Thu, 22 Jan 2026 14:32:34 +0100
From: Andrew Lunn <andrew@...n.ch>
To: 李志 <lizhi2@...incomputing.com>
Cc: devicetree@...r.kernel.org, andrew+netdev@...n.ch, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org, netdev@...r.kernel.org,
	pabeni@...hat.com, mcoquelin.stm32@...il.com,
	alexandre.torgue@...s.st.com, rmk+kernel@...linux.org.uk,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	ningyu@...incomputing.com, linmin@...incomputing.com,
	pinkesh.vaghela@...fochips.com, weishangjuan@...incomputing.com
Subject: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock
 sampling control

> On EIC7700, RXC and RXD experience an internal skew before reaching the
> MAC. At high speed, this can shift the effective sampling point by
> approximately half a cycle, causing the MAC to sample the wrong nibble
> on each edge.

You say internal. So the skew is fixed, it is a property of the
silicon? If so, why a DT property? Why not just hard code it in the
driver? Since it is internal, different boards should not need it set
differently?

	Andrew