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Message-Id: <E1vjEvA-00000005ghD-2i2t@rmk-PC.armlinux.org.uk>
Date: Fri, 23 Jan 2026 11:01:44 +0000
From: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>
To: Andrew Lunn <andrew@...n.ch>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Heiko Stuebner <heiko@...ech.de>,
Jakub Kicinski <kuba@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
netdev@...r.kernel.org,
Paolo Abeni <pabeni@...hat.com>
Subject: [PATCH net-next 17/21] net: stmmac: rk: replace empty set_to_rmii()
with supports_rmii
Rather than providing a now-empty set_to_rmii() method to indicate
that RMII is supported, switch to setting ops->supports_rmii instead.
Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
---
.../net/ethernet/stmicro/stmmac/dwmac-rk.c | 86 ++++++-------------
1 file changed, 24 insertions(+), 62 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 49a075565832..2d464ecb0e8f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -255,12 +255,7 @@ static void rk_gmac_integrated_fephy_powerdown(struct rk_priv_data *priv,
#define PX30_GRF_GMAC_CON1 0x0904
-static void px30_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops px30_ops = {
- .set_to_rmii = px30_set_to_rmii,
.set_speed = rk_set_clk_mac_speed,
.gmac_grf_reg = PX30_GRF_GMAC_CON1,
@@ -268,6 +263,8 @@ static const struct rk_gmac_ops px30_ops = {
.clock_grf_reg = PX30_GRF_GMAC_CON1,
.clock.mac_speed_mask = BIT_U16(2),
+
+ .supports_rmii = true,
};
#define RK3128_GRF_MAC_CON0 0x0168
@@ -294,13 +291,8 @@ static void rk3128_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3128_GMAC_CLK_TX_DL_CFG(tx_delay));
}
-static void rk3128_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rk3128_ops = {
.set_to_rgmii = rk3128_set_to_rgmii,
- .set_to_rmii = rk3128_set_to_rmii,
.gmac_grf_reg = RK3128_GRF_MAC_CON1,
.gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
@@ -310,6 +302,8 @@ static const struct rk_gmac_ops rk3128_ops = {
.clock.gmii_clk_sel_mask = GENMASK_U16(13, 12),
.clock.rmii_clk_sel_mask = BIT_U16(11),
.clock.mac_speed_mask = BIT_U16(10),
+
+ .supports_rmii = true,
};
#define RK3228_GRF_MAC_CON0 0x0900
@@ -397,13 +391,8 @@ static void rk3288_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3288_GMAC_CLK_TX_DL_CFG(tx_delay));
}
-static void rk3288_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rk3288_ops = {
.set_to_rgmii = rk3288_set_to_rgmii,
- .set_to_rmii = rk3288_set_to_rmii,
.gmac_grf_reg = RK3288_GRF_SOC_CON1,
.gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
@@ -413,6 +402,8 @@ static const struct rk_gmac_ops rk3288_ops = {
.clock.gmii_clk_sel_mask = GENMASK_U16(13, 12),
.clock.rmii_clk_sel_mask = BIT_U16(11),
.clock.mac_speed_mask = BIT_U16(10),
+
+ .supports_rmii = true,
};
#define RK3308_GRF_MAC_CON0 0x04a0
@@ -421,18 +412,14 @@ static const struct rk_gmac_ops rk3288_ops = {
#define RK3308_GMAC_FLOW_CTRL GRF_BIT(3)
#define RK3308_GMAC_FLOW_CTRL_CLR GRF_CLR_BIT(3)
-static void rk3308_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rk3308_ops = {
- .set_to_rmii = rk3308_set_to_rmii,
-
.gmac_grf_reg = RK3308_GRF_MAC_CON0,
.gmac_phy_intf_sel_mask = GENMASK_U16(4, 2),
.clock_grf_reg = RK3308_GRF_MAC_CON0,
.clock.mac_speed_mask = BIT_U16(0),
+
+ .supports_rmii = true,
};
#define RK3328_GRF_MAC_CON0 0x0900
@@ -484,10 +471,6 @@ static void rk3328_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3328_GMAC_CLK_TX_DL_CFG(tx_delay));
}
-static void rk3328_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static void rk3328_integrated_phy_powerup(struct rk_priv_data *priv)
{
regmap_write(priv->grf, RK3328_GRF_MACPHY_CON1,
@@ -499,7 +482,6 @@ static void rk3328_integrated_phy_powerup(struct rk_priv_data *priv)
static const struct rk_gmac_ops rk3328_ops = {
.init = rk3328_init,
.set_to_rgmii = rk3328_set_to_rgmii,
- .set_to_rmii = rk3328_set_to_rmii,
.integrated_phy_powerup = rk3328_integrated_phy_powerup,
.integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown,
@@ -509,6 +491,8 @@ static const struct rk_gmac_ops rk3328_ops = {
.clock.rmii_clk_sel_mask = BIT_U16(7),
.clock.mac_speed_mask = BIT_U16(2),
+ .supports_rmii = true,
+
.regs_valid = true,
.regs = {
0xff540000, /* gmac2io */
@@ -541,13 +525,8 @@ static void rk3366_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3366_GMAC_CLK_TX_DL_CFG(tx_delay));
}
-static void rk3366_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rk3366_ops = {
.set_to_rgmii = rk3366_set_to_rgmii,
- .set_to_rmii = rk3366_set_to_rmii,
.gmac_grf_reg = RK3366_GRF_SOC_CON6,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
@@ -557,6 +536,8 @@ static const struct rk_gmac_ops rk3366_ops = {
.clock.gmii_clk_sel_mask = GENMASK_U16(5, 4),
.clock.rmii_clk_sel_mask = BIT_U16(3),
.clock.mac_speed_mask = BIT_U16(7),
+
+ .supports_rmii = true,
};
#define RK3368_GRF_SOC_CON15 0x043c
@@ -583,13 +564,8 @@ static void rk3368_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3368_GMAC_CLK_TX_DL_CFG(tx_delay));
}
-static void rk3368_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rk3368_ops = {
.set_to_rgmii = rk3368_set_to_rgmii,
- .set_to_rmii = rk3368_set_to_rmii,
.gmac_grf_reg = RK3368_GRF_SOC_CON15,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
@@ -599,6 +575,8 @@ static const struct rk_gmac_ops rk3368_ops = {
.clock.gmii_clk_sel_mask = GENMASK_U16(5, 4),
.clock.rmii_clk_sel_mask = BIT_U16(3),
.clock.mac_speed_mask = BIT_U16(7),
+
+ .supports_rmii = true,
};
#define RK3399_GRF_SOC_CON5 0xc214
@@ -625,13 +603,8 @@ static void rk3399_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3399_GMAC_CLK_TX_DL_CFG(tx_delay));
}
-static void rk3399_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rk3399_ops = {
.set_to_rgmii = rk3399_set_to_rgmii,
- .set_to_rmii = rk3399_set_to_rmii,
.gmac_grf_reg = RK3399_GRF_SOC_CON5,
.gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
@@ -641,6 +614,8 @@ static const struct rk_gmac_ops rk3399_ops = {
.clock.gmii_clk_sel_mask = GENMASK_U16(5, 4),
.clock.rmii_clk_sel_mask = BIT_U16(3),
.clock.mac_speed_mask = BIT_U16(7),
+
+ .supports_rmii = true,
};
#define RK3506_GRF_SOC_CON8 0x0020
@@ -871,18 +846,15 @@ static void rk3568_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3568_GMAC_TXCLK_DLY_ENABLE);
}
-static void rk3568_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rk3568_ops = {
.init = rk3568_init,
.set_to_rgmii = rk3568_set_to_rgmii,
- .set_to_rmii = rk3568_set_to_rmii,
.set_speed = rk_set_clk_mac_speed,
.gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
+ .supports_rmii = true,
+
.regs_valid = true,
.regs = {
0xfe2a0000, /* gmac0 */
@@ -956,10 +928,6 @@ static void rk3576_set_to_rgmii(struct rk_priv_data *bsp_priv,
RK3576_GMAC_CLK_RX_DL_CFG(rx_delay));
}
-static void rk3576_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static void rk3576_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,
bool enable)
{
@@ -979,7 +947,6 @@ static void rk3576_set_clock_selection(struct rk_priv_data *bsp_priv, bool input
static const struct rk_gmac_ops rk3576_ops = {
.init = rk3576_init,
.set_to_rgmii = rk3576_set_to_rgmii,
- .set_to_rmii = rk3576_set_to_rmii,
.set_clock_selection = rk3576_set_clock_selection,
.gmac_rmii_mode_mask = BIT_U16(3),
@@ -987,6 +954,8 @@ static const struct rk_gmac_ops rk3576_ops = {
.clock.gmii_clk_sel_mask = GENMASK_U16(6, 5),
.clock.rmii_clk_sel_mask = BIT_U16(5),
+ .supports_rmii = true,
+
.php_grf_required = true,
.regs_valid = true,
.regs = {
@@ -1106,19 +1075,15 @@ static const struct rk_gmac_ops rk3588_ops = {
#define RV1108_GMAC_FLOW_CTRL GRF_BIT(3)
#define RV1108_GMAC_FLOW_CTRL_CLR GRF_CLR_BIT(3)
-static void rv1108_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rv1108_ops = {
- .set_to_rmii = rv1108_set_to_rmii,
-
.gmac_grf_reg = RV1108_GRF_GMAC_CON0,
.gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
.clock_grf_reg = RV1108_GRF_GMAC_CON0,
.clock.rmii_clk_sel_mask = BIT_U16(7),
.clock.mac_speed_mask = BIT_U16(2),
+
+ .supports_rmii = true,
};
#define RV1126_GRF_GMAC_CON0 0X0070
@@ -1162,17 +1127,14 @@ static void rv1126_set_to_rgmii(struct rk_priv_data *bsp_priv,
RV1126_GMAC_M1_CLK_TX_DL_CFG(tx_delay));
}
-static void rv1126_set_to_rmii(struct rk_priv_data *bsp_priv)
-{
-}
-
static const struct rk_gmac_ops rv1126_ops = {
.set_to_rgmii = rv1126_set_to_rgmii,
- .set_to_rmii = rv1126_set_to_rmii,
.set_speed = rk_set_clk_mac_speed,
.gmac_grf_reg = RV1126_GRF_GMAC_CON0,
.gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
+
+ .supports_rmii = true,
};
static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
--
2.47.3
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