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Message-ID: <20260125212805.3374863-1-kuba@kernel.org>
Date: Sun, 25 Jan 2026 13:28:05 -0800
From: Jakub Kicinski <kuba@...nel.org>
To: mmyangfl@...il.com
Cc: Jakub Kicinski <kuba@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
pabeni@...hat.com,
lorenzo@...nel.org,
andrew+netdev@...n.ch,
netdev@...r.kernel.org,
davem@...emloft.net,
edumazet@...gle.com,
linux-kernel@...r.kernel.org
Subject: Re: [net-next] net: airoha: Use u64_stats_t with u64_stats_sync properly
This is an AI-generated review of your patch. The human sending this
email has considered the AI review valid, or at least plausible.
For local reproduction steps see https://netdev-ai.bots.linux.dev/ai-local.html
---
net: airoha: Use u64_stats_t with u64_stats_sync properly
This commit converts statistics fields from u64 to u64_stats_t and changes
direct arithmetic operations to u64_stats_add()/u64_stats_read() calls
to ensure atomic operations on 64-bit architectures.
> diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
> index 62bcbbbe2a95..6ed220e5a094 100644
> --- a/drivers/net/ethernet/airoha/airoha_eth.c
> +++ b/drivers/net/ethernet/airoha/airoha_eth.c
> @@ -1472,131 +1472,131 @@ static void airoha_update_hw_stats(struct airoha_gdm_port *port)
>
> /* TX */
> val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_PKT_CNT_H(port->id));
> - port->stats.tx_ok_pkts += ((u64)val << 32);
> + u64_stats_add(&port->stats.tx_ok_pkts, (u64)val << 32);
On 32-bit systems (ARCH_AIROHA is supported on ARM32 per
arch/arm/Kconfig.platforms), does this lose the upper 32 bits of the
counter?
The u64_stats_add() signature is:
static inline void u64_stats_add(u64_stats_t *p, unsigned long val)
On 32-bit architectures, unsigned long is 32 bits. When (u64)val << 32
is passed, the resulting 64-bit value is truncated to unsigned long.
Since all the non-zero bits are in the upper half, the truncation yields
zero.
The original code worked because the destination was u64:
port->stats.tx_ok_pkts += ((u64)val << 32);
This pattern appears 16 times in airoha_update_hw_stats() for all the
_CNT_H registers (tx_ok_pkts, tx_ok_bytes, tx_len[], rx_ok_pkts,
rx_ok_bytes, rx_len[]). On 32-bit builds, these counters would only
accumulate the low 32 bits from the hardware.
[ ... ]
--
pw-bot: cr
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