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Message-ID: <CAD4GDZwAuX+W5e36R0sSySf9jdCw20YwiO==3CB59d4fpFdRYA@mail.gmail.com>
Date: Tue, 27 Jan 2026 11:20:09 +0000
From: Donald Hunter <donald.hunter@...il.com>
To: "Remy D. Farley" <one-d-wide@...tonmail.com>
Cc: Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org, 
	Pablo Neira Ayuso <pablo@...filter.org>, Jozsef Kadlecsik <kadlec@...filter.org>, 
	Florian Westphal <fw@...len.de>, Phil Sutter <phil@....cc>, netfilter-devel@...r.kernel.org, 
	coreteam@...filter.org
Subject: Re: [PATCH v6 2/6] doc/netlink: nftables: Add definitions

On Wed, 21 Jan 2026 at 18:47, Remy D. Farley <one-d-wide@...tonmail.com> wrote:
>
> New enums/flags:
> - payload-base
> - range-ops
> - registers
> - numgen-types
> - log-level
> - log-flags
>
> Added missing enumerations:
> - bitwise-ops
>
> Annotated doc comment or associated enum:
> - bitwise-ops
>
> Signed-off-by: Remy D. Farley <one-d-wide@...tonmail.com>
> ---
>  Documentation/netlink/specs/nftables.yaml | 157 +++++++++++++++++++++-
>  1 file changed, 154 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/netlink/specs/nftables.yaml b/Documentation/netlink/specs/nftables.yaml
> index 17ad707fa..87cd4d201 100644
> --- a/Documentation/netlink/specs/nftables.yaml
> +++ b/Documentation/netlink/specs/nftables.yaml
> @@ -66,9 +66,17 @@ definitions:
>      name: bitwise-ops
>      type: enum
>      entries:
> -      - bool
> -      - lshift
> -      - rshift
> +      -
> +        name: mask-xor  # aka bool (old name)
> +        doc: >-
> +          mask-and-xor operation used to implement NOT, AND, OR and XOR boolean
> +          operations
> +      # Spinx docutils display warning when interleaving attrsets with strings

No need for the comment here. Better to explain the refactor in the
patch description

> +      - name: lshift
> +      - name: rshift
> +      - name: and
> +      - name: or
> +      - name: xor

I'd prefer to see the list marker and attribute on separate lines, we
only use the compact format for pure lists of names.

>    -
>      name: cmp-ops
>      type: enum
> @@ -132,6 +140,12 @@ definitions:
>        - object
>        - concat
>        - expr
> +  -
> +    name: set-elem-flags
> +    type: flags
> +    entries:
> +      - interval-end
> +      - catchall
>    -
>      name: lookup-flags
>      type: flags
> @@ -225,6 +239,127 @@ definitions:
>        - icmp-unreach
>        - tcp-rst
>        - icmpx-unreach
> +  -
> +    name: reject-inet-code
> +    doc: These codes are mapped to real ICMP and ICMPv6 codes.
> +    type: enum
> +    entries:
> +      - icmpx-no-route
> +      - icmpx-port-unreach
> +      - icmpx-host-unreach
> +      - icmpx-admin-prohibited
> +  -
> +    name: payload-base
> +    type: enum
> +    entries:
> +      - link-layer-header
> +      - network-header
> +      - transport-header
> +      - inner-header
> +      - tun-header
> +  -
> +    name: range-ops
> +    doc: Range operator
> +    type: enum
> +    entries:
> +      - eq
> +      - neq
> +  -
> +    name: registers
> +    doc: |
> +      nf_tables registers.
> +      nf_tables used to have five registers: a verdict register and four data
> +      registers of size 16. The data registers have been changed to 16 registers
> +      of size 4. For compatibility reasons, the NFT_REG_[1-4] registers still
> +      map to areas of size 16, the 4 byte registers are addressed using
> +      NFT_REG32_00 - NFT_REG32_15.
> +    type: enum
> +    entries:
> +      # Spinx docutils display warning when interleaving attrsets and strings

Same here, please remove sphinx comment and use the preferred list formatting.

> +      - name: reg-verdict
> +      - name: reg-1
> +      - name: reg-2
> +      - name: reg-3
> +      - name: reg-4
> +      - name: reg32-00
> +        value: 8
> +      - name: reg32-01
> +      - name: reg32-02
> +      - name: reg32-03
> +      - name: reg32-04
> +      - name: reg32-05
> +      - name: reg32-06
> +      - name: reg32-07
> +      - name: reg32-08
> +      - name: reg32-09
> +      - name: reg32-10
> +      - name: reg32-11
> +      - name: reg32-12
> +      - name: reg32-13
> +      - name: reg32-14
> +      - name: reg32-15

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