netdev - Re: [PATCH v3 2/4] dt-bindings: net: nxp,s32-dwmac: Declare per-queue interrupts

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Message-ID: <aXi07hPBrl7EYezi@lsv051416.swis.nl-cdc01.nxp.com>
Date: Tue, 27 Jan 2026 13:51:58 +0100
From: Jan Petrous <jan.petrous@....nxp.com>
To: Conor Dooley <conor@...nel.org>
Cc: Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Chester Lin <chester62515@...il.com>,
	Matthias Brugger <mbrugger@...e.com>,
	Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
	NXP S32 Linux Team <s32@....com>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, netdev@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	imx@...ts.linux.dev, devicetree@...r.kernel.org
Subject: Re: [PATCH v3 2/4] dt-bindings: net: nxp,s32-dwmac: Declare
 per-queue interrupts

On Mon, Jan 26, 2026 at 08:00:33PM +0000, Conor Dooley wrote:
> On Mon, Jan 26, 2026 at 01:46:45PM +0100, Jan Petrous wrote:
> > On Fri, Jan 23, 2026 at 05:13:03PM +0000, Conor Dooley wrote:
> > > On Fri, Jan 23, 2026 at 11:09:55AM +0100, Jan Petrous via B4 Relay wrote:
> > > > From: "Jan Petrous (OSS)" <jan.petrous@....nxp.com>
> > > > 
> > > > The DWMAC IP on NXP S32G/R SoCs has connected queue-based IRQ lines,
> > > > set them to allow using Multi-IRQ mode when supported.
> > > 
> > > The binding only supports s32{g,r} devices, why is the existing minimum
> > > retained? What devices are going to not have all 11 interrupts
> > > connected?
> > > 
> > 
> > The original idea was to support backward compatibility, as older DTs
> > didn't contain queue-based interrupt lines described.
> > 
> > But now, when you asked, I started to think it is not needed,
> > the requirement for backward compatibility is managed inside the driver
> > and yaml shall describe the hardware not used configuration.
> 
> Just to be clear, cos the last portion of that "yaml shall..." isn't to
> me, you mean that the driver will support 1 or 11 interrupts but you
> will make the binding only allow 11? That would be fine.
> Just note in the commit message that all of these devices have the 11
> interrupts.
> 

Well, all those supported devices have 11 interrupts connected (1x MAC),
then 5x RX (queue0..queue4) and  5x TX (queue0..queue4).

Until now, the driver was using on MAC IRQ, so the only one shared line.
Now, we are enabling support for per-queue interrupts, what means for
supported SoCs up to 11 IRQs as the DWMAC IP on S32G/R has 5 queues.

The driver can still opearate on this one shared IRQ mode, but
if the DT node configuration describes all IRQs, then the driver switch
to multi-IRQ mode. What allows better distribution of processor core
load.

So the 11 IRQs are the maximum value, in the case when all queues are
used. But I can imagine some other use-cases, when not all queues
are enabled, ie. only queue0 and quque1. In that case, the driver will
use some subset of all IRQs.
That means that DT can contain only lesser interrupt list then maximum.

I feel like having "minItems: 1" shall cover such use-case.

BR.
/Jan