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Message-ID: <13d1018c-d9aa-4838-8bb3-35c509cd3e35@lunn.ch>
Date: Wed, 28 Jan 2026 14:25:22 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Michael Trimarchi <michael@...rulasolutions.com>
Cc: Wei Fang <wei.fang@....com>, Shenwei Wang <shenwei.wang@....com>,
Clark Wang <xiaoning.wang@....com>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"open list:FREESCALE IMX / MXC FEC DRIVER" <imx@...ts.linux.dev>,
"open list:FREESCALE IMX / MXC FEC DRIVER" <netdev@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH] net: phy: integrate reset-after-clock quirk into
phy_init_hw
On Wed, Jan 28, 2026 at 10:46:41AM +0100, Michael Trimarchi wrote:
> The current implementation of phy_reset_after_clk_enable requires MAC drivers
> (like fec_main.c) to manually track PHY probing states and trigger resets
> at specific points in their clock management flow and was created just for a SoC
> vendor.
We try to keep workarounds for specific SoC vendors out of the core,
when possible. It just makes the core more complex for an edge case
which most people don't care about. It is better to hide the
complexity away in the driver which needs it.
> This leads to fragile code in the Ethernet driver, involving complex
> checks to see if the PHY device is bound.
Have you found an actual issue with the code in the driver?
Andrew
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