netdev - Re: [net-next,v5,08/13] octeontx2-af: npc: cn20k: Add new mailboxes for CN20K silicon

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20260128022926.4153023-1-kuba@kernel.org>
Date: Tue, 27 Jan 2026 18:29:26 -0800
From: Jakub Kicinski <kuba@...nel.org>
To: rkannoth@...vell.com
Cc: Jakub Kicinski <kuba@...nel.org>,
	sbhatta@...vell.com,
	edumazet@...gle.com,
	andrew+netdev@...n.ch,
	netdev@...r.kernel.org,
	sgoutham@...vell.com,
	sumang@...vell.com,
	pabeni@...hat.com,
	davem@...emloft.net,
	linux-kernel@...r.kernel.org
Subject: Re: [net-next,v5,08/13] octeontx2-af: npc: cn20k: Add new mailboxes for CN20K silicon

This is an AI-generated review of your patch. The human sending this
email has considered the AI review valid, or at least plausible.

For local reproduction steps see https://netdev-ai.bots.linux.dev/ai-local.html
---
octeontx2-af: npc: cn20k: Add new mailboxes for CN20K silicon

This patch adds new mailbox handlers for CN20K silicon to handle MCAM
entries with larger keyword arrays (8 instead of 7), using separate
struct cn20k_mcam_entry to maintain backward compatibility.

> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
> index cb05ec69e0b3..cefc5d70f3e4 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
> @@ -644,6 +644,7 @@ struct rvu_npc_mcam_rule {
>  	u16 chan;
>  	u16 chan_mask;
>  	u8 lxmb;
> +	u8 hw_prio;
>  };

[ ... ]

> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
> index 425d3a43c0b8..620724dad093 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

[ ... ]

> @@ -3554,6 +3555,15 @@ static int rvu_dbg_npc_mcam_show_rules(struct seq_file *s, void *unused)
>
>  		enabled = is_mcam_entry_enabled(rvu, mcam, blkaddr, iter->entry);
>  		seq_printf(s, "\tenabled: %s\n", enabled ? "yes" : "no");
> +		if (is_cn20k(rvu->pdev)) {
> +			seq_printf(s, "\tpriority: %u\n", iter->hw_prio);

The hw_prio field is added to struct rvu_npc_mcam_rule and read here in
debugfs, but I could not find where rule->hw_prio gets assigned in
npc_install_flow(). Looking at the diff, cn20k_wreq.hw_prio is set from
req->hw_prio, but rule->hw_prio appears to be left uninitialized.

Since rules are allocated with kzalloc(), hw_prio will be zero, causing
debugfs to always show "priority: 0" for CN20K rules regardless of the
actual hardware priority configured.

I see commit 62770f15276b "octeontx2-af: npc: cn20k: add debugfs support"
later in the series adds "rule->hw_prio = req->hw_prio;" which appears to
fix this. Should that assignment be part of this patch instead?

> +			index = iter->entry & (mcam->banksize - 1);
> +			bank = npc_get_bank(mcam, iter->entry);
> +			off = NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(index, bank);
> +			hits = rvu_read64(rvu, blkaddr, off);
> +			seq_printf(s, "\thits: %lld\n", hits);
> +			continue;
> +		}

[ ... ]