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Message-ID: <CA+V-a8vL-Ze5J0sUcpuD_fDX0xixF6MQWuxXzz5dRW4VYydWiw@mail.gmail.com> Date: Sun, 1 Feb 2026 18:32:28 +0000 From: "Lad, Prabhakar" <prabhakar.csengg@...il.com> To: Biju <biju.das.au@...il.com> Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Richard Cochran <richardcochran@...il.com>, Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>, Biju Das <biju.das.jz@...renesas.com>, Alexandre Torgue <alexandre.torgue@...s.st.com>, Giuseppe Cavallaro <peppe.cavallaro@...com>, Jose Abreu <joabreu@...opsys.com>, netdev@...r.kernel.org, linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, Conor Dooley <conor.dooley@...rochip.com> Subject: Re: [PATCH net-next v3 1/2] dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L SoC On Sat, Jan 31, 2026 at 4:13 PM Biju <biju.das.au@...il.com> wrote: > > From: Biju Das <biju.das.jz@...renesas.com> > > Add device tree binding support for the Gigabit Ethernet (GBETH) IP on > Renesas RZ/G3L SoC. This SoC uses different Synopsys DesignWare MAC > version 5.30 compared to RZ/G3E. > > RZ/G3L requires an extra clock compared to RZ/G3E and has pps interrupts. > > Add a new compatible string "renesas,r9a08g046-gbeth" for RZ/G3L SoC and > update the schema to handle hardware differences between SoC variants. > > Extend the base snps,dwmac.yaml schema to accommodate the PPS interrupts. > > Acked-by: Conor Dooley <conor.dooley@...rochip.com> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com> > --- > v2->v3: > * Fixed the typo ppt->ptp as pointed by netdev-ai[1]. > * Keep the tag as the change is trivial > [1]https://netdev-ai.bots.linux.dev/ai-review.html?id=495cbea4-c154-4027-9ecf-0167906492fe > v1->v2: > * Collected tag > --- > .../bindings/net/renesas,rzv2h-gbeth.yaml | 77 ++++++++++++++++--- > .../devicetree/bindings/net/snps,dwmac.yaml | 3 + > 2 files changed, 69 insertions(+), 11 deletions(-) > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com> Cheers, Prabhakar > diff --git a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml > index bd53ab300f50..fb60f745a1ff 100644 > --- a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml > +++ b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml > @@ -26,6 +26,9 @@ select: > properties: > compatible: > oneOf: > + - items: > + - const: renesas,r9a08g046-gbeth # RZ/G3L > + - const: snps,dwmac-5.30a > - items: > - enum: > - renesas,r9a09g047-gbeth # RZ/G3E > @@ -47,13 +50,17 @@ properties: > clocks: > oneOf: > - items: > - - description: CSR clock > - - description: AXI system clock > + - description: CSR/Register access clock > + - description: AXI system/Main clock > - description: PTP clock > - description: TX clock > - description: RX clock > - description: TX clock phase-shifted by 180 degrees > - description: RX clock phase-shifted by 180 degrees > + - description: RMII clock > + > + minItems: 7 > + > - items: > - description: CSR clock > - description: AXI system clock > @@ -69,6 +76,10 @@ properties: > - const: rx > - const: tx-180 > - const: rx-180 > + - const: rmii > + > + minItems: 7 > + > - items: > - const: stmmaceth > - const: pclk > @@ -88,6 +99,22 @@ properties: > - const: tx-queue-1 > - const: tx-queue-2 > - const: tx-queue-3 > + - items: > + - const: macirq > + - const: eth_wake_irq > + - const: eth_lpi > + - const: rx-queue-0 > + - const: rx-queue-1 > + - const: rx-queue-2 > + - const: rx-queue-3 > + - const: tx-queue-0 > + - const: tx-queue-1 > + - const: tx-queue-2 > + - const: tx-queue-3 > + - const: ptp-pps-0 > + - const: ptp-pps-1 > + - const: ptp-pps-2 > + - const: ptp-pps-3 > - items: > - const: macirq > - const: eth_wake_irq > @@ -135,6 +162,27 @@ required: > allOf: > - $ref: snps,dwmac.yaml# > > + - if: > + properties: > + compatible: > + contains: > + const: renesas,r9a08g046-gbeth > + then: > + properties: > + clocks: > + minItems: 8 > + > + clock-names: > + minItems: 8 > + > + interrupts: > + minItems: 15 > + maxItems: 15 > + > + interrupt-names: > + minItems: 15 > + maxItems: 15 > + > - if: > properties: > compatible: > @@ -163,12 +211,26 @@ allOf: > required: > - reset-names > else: > + properties: > + resets: > + maxItems: 1 > + > + pcs-handle: false > + > + reset-names: false > + > + - if: > + properties: > + compatible: > + contains: > + const: renesas,rzv2h-gbeth > + then: > properties: > clocks: > - minItems: 7 > + maxItems: 7 > > clock-names: > - minItems: 7 > + maxItems: 7 > > interrupts: > minItems: 11 > @@ -178,13 +240,6 @@ allOf: > minItems: 11 > maxItems: 11 > > - resets: > - maxItems: 1 > - > - pcs-handle: false > - > - reset-names: false > - > unevaluatedProperties: false > > examples: > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > index dd3c72e8363e..38bc34dc4f09 100644 > --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml > +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > @@ -75,6 +75,7 @@ properties: > - qcom,sc8280xp-ethqos > - qcom,sm8150-ethqos > - renesas,r9a06g032-gmac > + - renesas,r9a08g046-gbeth > - renesas,r9a09g077-gbeth > - renesas,rzn1-gmac > - renesas,rzv2h-gbeth > @@ -142,6 +143,8 @@ properties: > pattern: '^rx-queue-[0-7]$' > - description: Per channel transmit completion interrupt > pattern: '^tx-queue-[0-7]$' > + - description: PPS interrupt > + pattern: '^ptp-pps-[0-3]$' > > clocks: > minItems: 1 > -- > 2.43.0 > >
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