netdev - Re: [PATCH iproute2-next] dpll: add support for fractional frequency offset in ppt

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Message-ID: <1228b1f7-1765-4eea-90be-c9ddbc12cf82@redhat.com>
Date: Wed, 4 Feb 2026 14:08:48 +0100
From: Petr Oros <poros@...hat.com>
To: Ivan Vecera <ivecera@...hat.com>, netdev@...r.kernel.org
Cc: David Ahern <dsahern@...nel.org>,
 Stephen Hemminger <stephen@...workplumber.org>, Jiri Pirko <jiri@...nulli.us>
Subject: Re: [PATCH iproute2-next] dpll: add support for fractional frequency
 offset in ppt


On 2/3/26 11:14, Ivan Vecera wrote:
> Add support for the DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT attribute
> to the pin print attributes.
>
> The logic ensures that in standard (human-readable) output, the legacy
> fractional-frequency-offset is hidden if the new ppt (parts per trillion)
> value is present, preventing redundant information.
>
> However, the legacy attribute is still printed if:
> 1. The output format is JSON (to maintain full data availability).
> 2. The new PPT attribute is missing (backward compatibility with older
>     kernels).
>
> Human-readable output example:
> ==============================
> [root@...t iproute2-next]# ./dpll/dpll pin show id 5
> pin id 5:
>    module-name: zl3073x
>    clock-id: 5855731461854439600
>    board-label: TCX0
>    package-label: REF4P
>    type: ext
>    frequency: 20000000 Hz
>    frequency-supported:
>      20000000 Hz
>    capabilities: 0x6 state-can-change priority-can-change
>    phase-adjust-min: -2147483648
>    phase-adjust-max: 2147483647
>    phase-adjust: 0
>    fractional-frequency-offset-ppt: 3003980
>    esync-frequency: 0 Hz
>    esync-pulse: 0
>    parent-device:
>      id 0 direction input prio 14 state disconnected phase-offset 0
>      id 1 direction input prio 14 state disconnected phase-offset 0
>
> JSON output example:
> ====================
> [root@...t iproute2-next]# ./dpll/dpll -j -p pin show id 5
> {
>      "id": 5,
>      "module-name": "zl3073x",
>      "clock-id": 5855731461854439600,
>      "board-label": "TCX0",
>      "package-label": "REF4P",
>      "type": "ext",
>      "frequency": 20000000,
>      "frequency-supported": [ {
>              "frequency-min": 20000000,
>              "frequency-max": 20000000
>          } ],
>      "capabilities": [ "state-can-change","priority-can-change" ],
>      "phase-adjust-min": -2147483648,
>      "phase-adjust-max": 2147483647,
>      "phase-adjust": 0,
>      "fractional-frequency-offset": 3,
>      "fractional-frequency-offset-ppt": 3042863,
>      "esync-frequency": 0,
>      "esync-pulse": 0,
>      "parent-device": [ {
>              "parent-id": 0,
>              "direction": "input",
>              "prio": 14,
>              "state": "disconnected",
>              "phase-offset": 0
>          },{
>              "parent-id": 1,
>              "direction": "input",
>              "prio": 14,
>              "state": "disconnected",
>              "phase-offset": 0
>          } ]
> }
>
> Signed-off-by: Ivan Vecera <ivecera@...hat.com>
> ---
>   dpll/dpll.c | 7 +++++--
>   1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/dpll/dpll.c b/dpll/dpll.c
> index 9dc3f8db373d..624567c2a826 100644
> --- a/dpll/dpll.c
> +++ b/dpll/dpll.c
> @@ -1261,8 +1261,11 @@ static void dpll_pin_print_attrs(struct nlattr **tb)
>   	DPLL_PR_UINT(tb, DPLL_A_PIN_PHASE_ADJUST_GRAN, "phase-adjust-gran");
>   	DPLL_PR_INT(tb, DPLL_A_PIN_PHASE_ADJUST, "phase-adjust");
>   
> -	DPLL_PR_SINT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET,
> -		     "fractional-frequency-offset");
> +	if (json || !tb[DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT])
> +		DPLL_PR_SINT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET,
> +			     "fractional-frequency-offset");
> +	DPLL_PR_SINT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT,
> +		     "fractional-frequency-offset-ppt");
>   
>   	DPLL_PR_U64_FMT(tb, DPLL_A_PIN_ESYNC_FREQUENCY, "esync-frequency",
>   			"  esync-frequency: %" PRIu64 " Hz\n");

Reviewed-by: Petr Oros <poros@...hat.com>