netdev - Re: [PATCH net] dpll: zl3073x: Fix output pin phase adjustment sign

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Message-ID: <ae73b2e5-f008-48c9-a960-c147590b6ac4@redhat.com>
Date: Fri, 6 Feb 2026 16:02:58 +0100
From: Ivan Vecera <ivecera@...hat.com>
To: Vadim Fedorenko <vadim.fedorenko@...ux.dev>, netdev@...r.kernel.org
Cc: Prathosh Satish <Prathosh.Satish@...rochip.com>,
 Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
 Jiri Pirko <jiri@...nulli.us>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net] dpll: zl3073x: Fix output pin phase adjustment sign

On 2/6/26 3:04 PM, Vadim Fedorenko wrote:
> On 05/02/2026 18:10, Ivan Vecera wrote:
>> The output pin phase adjustment functions incorrectly negate the phase
>> compensation value.
>>
>> Per the ZL3073x datasheet, the output phase compensation register is
>> simply a signed two's complement integer where:
>>   - Positive values move the phase later in time
>>   - Negative values move the phase earlier in time
>>
>> No negation is required. The erroneous negation caused phase adjustments
>> to be applied in the wrong direction.
>>
>> Note that input pin phase adjustment correctly uses negation because the
>> hardware has an inverted convention for input references (positive moves
>> phase earlier, negative moves phase later).
> 
> Is it common for DPLLs to act this way?

I don't now if this is common for DPLLs but for ZL3073x family chips the
datasheet says:

<cite>
ref_phase_offset_compensation:
==============================
Phase offset compensation for references. The value is specified as a
signed two's complement, in units of ps. A positive value moves the
phase of any DPLL that locks to this reference earlier in time (more to
the left on a scope). A negative value moves the phase of any DPLL that
locks to this reference later in time (more to the right on a scope).

output_phase_compensation:
==========================
Output phase shift, expressed in 1/2 synth clock cycles. Two-complement
signed integer.
A positive value moves the phase of the output later in time (more to
the right on a scope). A negative value moves the phase earlier in time
(more to the left on a scope).
</cite>

So for input pins the value must be negated, while for output pins it
is not.
>>
>> Fixes: 6287262f761e ("dpll: zl3073x: Add support to adjust phase")
>> Signed-off-by: Ivan Vecera <ivecera@...hat.com>
> 
> Anyways, with datasheet info being correctly read, the change LGTM
> Reviewed-by: Vadim Fedorenko <vadim.fedorenko@...ux.dev>
> 
Thanks,
Ivan