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Message-ID: <7e593ede-59eb-4316-ab72-949a51c008c6@lunn.ch>
Date: Mon, 9 Feb 2026 14:21:33 +0100
From: Andrew Lunn <andrew@...n.ch>
To: lizhi2@...incomputing.com
Cc: devicetree@...r.kernel.org, andrew+netdev@...n.ch, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org, netdev@...r.kernel.org,
	pabeni@...hat.com, mcoquelin.stm32@...il.com,
	alexandre.torgue@...s.st.com, rmk+kernel@...linux.org.uk,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	ningyu@...incomputing.com, linmin@...incomputing.com,
	pinkesh.vaghela@...fochips.com, weishangjuan@...incomputing.com
Subject: Re: [PATCH v2 1/2] dt-bindings: ethernet: eswin: add clock sampling
 control

> The rx-internal-delay-ps and tx-internal-delay-ps properties now use
> minimum and maximum constraints to reflect the actual hardware delay
> range (0-2400 ps) applied in 20 ps steps.


>    rx-internal-delay-ps:
> -    enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
> +    minimum: 0
> +    maximum: 2400

       multipleOf: 20

Also, 2400 / 20 = 120. Is the real maximum 127 * 20 = 2540?

> @@ -111,17 +129,44 @@ examples:
>          interrupts = <61>;
>          interrupt-names = "macirq";
>          phy-mode = "rgmii-id";
> -        phy-handle = <&phy0>;
> +        phy-handle = <&gmac0_phy0>;
>          resets = <&reset 95>;
>          reset-names = "stmmaceth";
> +        rx-internal-delay-ps = <20>;
> +        tx-internal-delay-ps = <100>;

I would not include them in the example. You are going to get
developers blindly copying this into real DT. A well designed board
should not need delays.

	Andrew

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