phc-discussions - Re: [PHC] Question about saturating the memory bandwidth

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Message-ID: <CAOLP8p6g9UEq2kZn0AkL9f5o8aa2UNr8yTf2JDFgO8mpnyp_bg@mail.gmail.com>
Date: Fri, 17 Jan 2014 23:15:44 -0500
From: Bill Cox <waywardgeek@...il.com>
To: discussions@...sword-hashing.net
Subject: Re: [PHC] Question about saturating the memory bandwidth

On Fri, Jan 17, 2014 at 10:08 AM, Ivica Nikolic <cube444@...glemail.com> wrote:
> Hi Bill,
>
> Thank you for your reply.
>
> Do you suggest that aside from the theoretical side channel attack, and
> under the assumption that the recomputation of the missing data is
> computationally expensive, an attacker cannot achieve more than 2x speedup?

Yes, assuming an attacker's ASIC has the same bandwidth as the GPU.

I think that high end single-chip GPUs have memory bandwidths that are
nearly as high as is possible with current technology.  I have to add
weasel wording: there are ways to speed up ASICs I'm not thinking
about, like liquid nitrogen cooling, and area-array bonding pad
technologies that might make possible some insane number of pins on a
mega-bandwidth device.  However, I've never seen such beasts.  I'd
feel pretty good about using such a KDF.  It should protect against
anything other than exotic technologies that go beyond regular ASICs.

I mostly deal with older process technologies now days (90nm and
larger).  Someone more involved in the latest and greatest processes
should know more about what limits modern ASICs.

Bill