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Date: Mon, 21 Apr 2014 17:07:39 -0400
From: Bill Cox <>
Subject: Re: [PHC] EARWORM speed and improved defense

On Mon, Apr 21, 2014 at 4:24 PM, Solar Designer <> wrote:

> Why did you choose 4 lanes?  Current CPUs need 5 to 9 cycles to compute
> AESENC, so 4 lanes are probably (barely) enough when running 2
> threads/core, but not enough on Intel CPUs lacking HT (OK, these are not
> meant to be used in servers, and older ones of these lack AES-NI) and
> with HT disabled (OK, maybe it's those admins' problem).

The algorithm normally uses 4 lanes, so mainly out of respect for the
author, I didn't change it.  I assume he had his reasons.  By my estimates,
he should be able to generate closer to 25GiB/s on my box if he had no
trouble with memory bandwidth.  Somehow going massively parallel does gain
him a couple more GiB/s...


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