linux-kernel - Re: [PATCH v4 2/3] irqchip: GIC: Add support for irq_{get,set}_irqchip

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Date:	Thu, 14 May 2015 12:32:38 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Feng Kan <fkan@....com>
Cc:	Marc Zyngier <marc.zyngier@....com>,
	Abhijeet Dharmapurikar <adharmap@...eaurora.org>,
	Stephen Boyd <sboyd@...eaurora.org>, Phong Vo <pvo@....com>,
	Tin Huynh <tnhuynh@....com>, Y Vo <yvo@....com>,
	Thomas Gleixner <tglx@...utronix.de>, Toan Le <toanle@....com>,
	Bjorn Andersson <bjorn@...o.se>,
	Jason Cooper <jason@...edaemon.net>,
	Arnd Bergmann <arnd@...db.de>,
	linux-arm-msm <linux-arm-msm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	Alexandre Courbot <gnurou@...il.com>
Subject: Re: [PATCH v4 2/3] irqchip: GIC: Add support for irq_{get,set}_irqchip_state

On Wed, May 13, 2015 at 5:44 PM, Feng Kan <fkan@....com> wrote:

> We are using the gpio driver with gpio_key for power button. The gpio
> status can only be retrieved from the GIC register when the gpio is
> acting as a interrupt.

OK I understand so much. SPISR is a status register of the state
of the IRQ lines of shared peripherals.

But surely the GPIO block has its own status register, so are
you saying that this register is unreliable?

I can think of a few reasons, like transient IRQs etc but
what is actually causing this?

Techically the GIC would normally be higher up the food
chain, i.e. one IRQ on the GIC is cascaded to sub-IRQs on
the GPIO chip by virtue of its own struct irq_chip and
irqdomain. The exception is typically only systems where
the GPIO block is fused with the IRQ controller so that each
GPIO line has its own unique IRQ line on the primary,
top-level interrupt controller.

Which GPIO driver is this? Is it upstream?

Yours,
Linus Walleij
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