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Date: Wed, 6 Jun 2018 14:05:39 +0200
From: Andrea Parri <andrea.parri@...rulasolutions.com>
To: Viresh Kumar <viresh.kumar@...aro.org>
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>, rjw@...ysocki.net,
linux-kernel@...r.kernel.org,
Eduardo Valentin <edubezval@...il.com>,
Javi Merino <javi.merino@...nel.org>,
Leo Yan <leo.yan@...aro.org>,
Kevin Wangtao <kevin.wangtao@...aro.org>,
Vincent Guittot <vincent.guittot@...aro.org>,
Rui Zhang <rui.zhang@...el.com>,
Daniel Thompson <daniel.thompson@...aro.org>,
"open list:POWER MANAGEMENT CORE" <linux-pm@...r.kernel.org>,
Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH V5] powercap/drivers/idle_injection: Add an idle
injection framework
Hi Daniel, Viresh,
On Wed, Jun 06, 2018 at 04:15:28PM +0530, Viresh Kumar wrote:
> On 06-06-18, 12:22, Daniel Lezcano wrote:
> > (mb() are done in the atomic operations AFAICT).
To do my bit, not all atomic ops do/imply memory barriers; e.g.,
[from Documentation/atomic_t.txt]
- non-RMW operations [e.g., atomic_set()] are unordered
- RMW operations that have no return value [e.g., atomic_inc()] are unordered
>
> AFAIU, it is required to make sure the operations are seen in a particular order
> on another CPU and the compiler doesn't reorganize code to optimize it.
>
> For example, in our case what if the compiler reorganizes the atomic-set
> operation after wakeup-process ? But maybe that wouldn't happen across function
> calls and we should be safe then.
IIUC, wake_up_process() implies a full memory barrier and a compiler barrier,
due to:
raw_spin_lock_irqsave(&p->pi_lock, flags);
smp_mb__after_spinlock();
The pattern under discussion isn't clear to me, but if you'll end up relying
on this "implicit" barrier I'd suggest documenting it with a comment.
Andrea
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