netdev - RE: [PATCH] phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

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Date:	Fri, 10 Oct 2014 11:24:10 +0000
From:	Bruno Thomsen <bth@...strup.dk>
To:	Angelo Dureghello <angelo70@...il.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: RE: [PATCH] phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

Hey again

> I add some useful info:
> there is a carrier change after phy is attached, but link state arrives as zero.
>
> [root@xb ~]# cat /sys/class/net/eth0/carrier
> carrier          carrier_changes
> [root@xb ~]# cat /sys/class/net/eth0/carrier
> 0
> [root@xb ~]# cat /sys/class/net/eth0/carrier_changes
> 1

Just to clarify, this patch fixes a real bug and from your first bug rapport it sounded like a similar issue.


On 09/10/2014 16:48, Bruno Thomsen wrote:
> Bug: Unable to send and receive Ethernet packets with Micrel PHY.
>
> Affected devices:
> KSZ8031RNL (commercial temp)
> KSZ8031RNLI (industrial temp)
>
> Description:
> PHY device is correctly detected during probe.
> PHY power-up default is 25MHz crystal clock input and output 50MHz 
> RMII clock to MAC.
> Reconfiguration of PHY to input 50MHz RMII clock from MAC causes PHY 
> to become unresponsive if clock source is changed after Operation Mode 
> Strap Override (OMSO) register setup.
>

Venlig hilsen / Best regards

Kamstrup A/S <http://www.kamstrup.dk> 
Bruno Thomsen
Development engineer
Technology

Kamstrup A/S
Industrivej 28
DK-8660 Skanderborg
Tel:	 +45 89 93 10 00	 
Fax:	 +45 89 93 10 01	 
Dir:	 +45 89 93 13 94	 
E-mail:	 bth@...strup.dk	 
Web:	 www.kamstrup.dk	
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