linux-kernel - Re: Why Semaphore Hardware-Dependent?

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Message-ID: <Pine.LNX.4.64.0608290926230.18503@schroedinger.engr.sgi.com>
Date:	Tue, 29 Aug 2006 09:28:08 -0700 (PDT)
From:	Christoph Lameter <clameter@....com>
To:	David Howells <dhowells@...hat.com>
cc:	Ralf Baechle <ralf@...ux-mips.org>,
	Nick Piggin <nickpiggin@...oo.com.au>,
	Arjan van de Ven <arjan@...radead.org>,
	Dong Feng <middle.fengdong@...il.com>, ak@...e.de,
	Paul Mackerras <paulus@...ba.org>,
	linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org
Subject: Re: Why Semaphore Hardware-Dependent? 

On Tue, 29 Aug 2006, David Howells wrote:

> Ralf Baechle <ralf@...ux-mips.org> wrote:
> 
> > > Which arches do not support cmpxchg?
> > 
> > MIPS, Alpha - probably any pure RISC load/store architecture.
> 
> Some of these have LL/SC or equivalent instead, but ARM5 and before, FRV, M68K
> before 68020 to name but a few.

This is all pretty ancient hardware, right? And they are mostly single 
processor so no need to worry about concurrency. Just disable interrupts.

> And anything that implements CMPXCHG with spinlocks is a really bad candidate
> for CMPXCHG-based rwsems.

Those will optimize out if it is a single processor configuration.

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