linux-kernel - Re: Uses for memory barriers

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Message-Id: <200609121222.01260.oliver@neukum.org>
Date:	Tue, 12 Sep 2006 12:22:00 +0200
From:	Oliver Neukum <oliver@...kum.org>
To:	David Howells <dhowells@...hat.com>
Cc:	paulmck@...ibm.com, Alan Stern <stern@...land.harvard.edu>,
	Kernel development list <linux-kernel@...r.kernel.org>
Subject: Re: Uses for memory barriers

Am Dienstag, 12. September 2006 11:01 schrieb David Howells:
> Paul E. McKenney <paulmck@...ibm.com> wrote:
> 
> > 2.	All stores to a given single memory location will be perceived
> > 	as having occurred in the same order by all CPUs.
> 
> Does that take into account a CPU combining or discarding coincident memory
> operations?
> 
> For instance, a CPU asked to issue two writes to the same location may discard
> the first if it hasn't done it yet.

Does it make sense? If you do:
mov #x, $a
wmb
mov #y, $b
wmb
mov #z, $a

The CPU must not discard any write. If you do

mov #x, $a
mov #y, $b
wmb
mov #z, $a

The first store to $a is superfluous if you have only inter-CPU
issues in mind.

	Regards
		Oliver
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