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Message-ID: <20061006192842.GO2563@parisc-linux.org>
Date: Fri, 6 Oct 2006 13:28:42 -0600
From: Matthew Wilcox <matthew@....cx>
To: Jeff Garzik <jeff@...zik.org>
Cc: Val Henson <val_henson@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...e.de>, netdev@...r.kernel.org,
linux-pci@...ey.karlin.mff.cuni.cz, linux-kernel@...r.kernel.org,
David Miller <davem@...emloft.net>
Subject: Re: [PATCH 2/2] [TULIP] Check the return value from pci_set_mwi()
On Fri, Oct 06, 2006 at 03:15:15PM -0400, Jeff Garzik wrote:
> Matthew Wilcox wrote:
> >Also, pci_set_mwi() will fail if the cache line
> >size is 0, so we don't need to check that ourselves any more.
>
> NAK, not true on all arches. sparc64 at least presumes that the
> firmware DTRT with cacheline size, which hurts us now given this tulip patch
How does it hurt us?
int pcibios_prep_mwi(struct pci_dev *dev)
{
/* We set correct PCI_CACHE_LINE_SIZE register values for every
* device probed on this platform. So there is nothing to check
* and this always succeeds.
*/
return 0;
}
If Dave's wrong about that, it hurts him, not us ;-)
It's still not necessary for the Tulip driver to check.
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