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Message-ID: <20061019181346.GA5421@linux-mips.org>
Date:	Thu, 19 Oct 2006 19:13:46 +0100
From:	Ralf Baechle <ralf@...ux-mips.org>
To:	Nick Piggin <nickpiggin@...oo.com.au>
Cc:	Linus Torvalds <torvalds@...l.org>, Andrew Morton <akpm@...l.org>,
	linux-kernel@...r.kernel.org, Atsushi Nemoto <anemo@....ocn.ne.jp>
Subject: Re: [PATCH 1/3] Fix COW D-cache aliasing on fork

On Fri, Oct 20, 2006 at 03:46:35AM +1000, Nick Piggin wrote:

> What about if you just flush the caches after write protecting all
> COW pages? Would that work? Simpler? Better performance? (I don't know)

That would require changing the order of cache flush and tlb flush.  To
keep certain architectures that require a valid translation in the TLB
the cacheflush has to be done first.  Not sure if those architectures need
a writeable mapping for dirty cachelines - I think hypersparc was one
of them.

  Ralf
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