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Message-ID: <ada3b9cbi4l.fsf@cisco.com>
Date: Wed, 25 Oct 2006 07:11:06 -0700
From: Roland Dreier <rdreier@...co.com>
To: Grant Grundler <grundler@...isc-linux.org>
Cc: linux-pci@...ey.karlin.mff.cuni.cz, linux-ia64@...r.kernel.org,
linux-kernel@...r.kernel.org, openib-general@...nib.org,
John Partridge <johnip@....com>
Subject: Re: Ordering between PCI config space writes and MMIO reads?
> I'm looking at arch/ia64/pci/pci.c.
> Wouldn't it be reasonable to include memory barriers around calls
> to SAL config space access functions?
It's reasonable, but is there a memory barrier strong enough to
guarantee that a config write has actually completed?
- R.
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