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Message-Id: <20061027234615.791b3942.akpm@osdl.org>
Date: Fri, 27 Oct 2006 23:46:15 -0700
From: Andrew Morton <akpm@...l.org>
To: thockin@...kin.org
Cc: Andi Kleen <ak@...e.de>,
Sergio Monteiro Basto <sergio@...giomb.no-ip.org>,
Lee Revell <rlrevell@...-job.com>,
Chris Friesen <cfriesen@...tel.com>,
linux-kernel <linux-kernel@...r.kernel.org>,
john stultz <johnstul@...ibm.com>
Subject: Re: AMD X2 unsynced TSC fix?
On Fri, 27 Oct 2006 23:35:24 -0700
thockin@...kin.org wrote:
> On Fri, Oct 27, 2006 at 09:06:12PM -0700, Andi Kleen wrote:
> >
> > > So far, has I can understand. Seems to me that my computer which have a
> > > Pentium D (Dual Core) on VIA chipset, also have unsynchronized TSC and
> > > with the patch of hrtimers on
> >
> > Intel systems (except for some large highend systems) have synchronized TSCs.
>
> Does Intel guarantee that, or is that just what we happen to see, so far.
Matthias has a Xeon machine on which the TSCs are unsynced, and which are
unsyncable - write_tsc() just doesn't do anything. See thread at
http://lkml.org/lkml/2006/7/22/104
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