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Message-Id: <200610280245.55803.ak@suse.de>
Date:	Sat, 28 Oct 2006 02:45:55 -0700
From:	Andi Kleen <ak@...e.de>
To:	Andrew Morton <akpm@...l.org>
Cc:	thockin@...kin.org,
	Sergio Monteiro Basto <sergio@...giomb.no-ip.org>,
	Lee Revell <rlrevell@...-job.com>,
	Chris Friesen <cfriesen@...tel.com>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	john stultz <johnstul@...ibm.com>
Subject: Re: AMD X2 unsynced TSC fix?

On Friday 27 October 2006 23:46, Andrew Morton wrote:
> On Fri, 27 Oct 2006 23:35:24 -0700
>
> thockin@...kin.org wrote:
> > On Fri, Oct 27, 2006 at 09:06:12PM -0700, Andi Kleen wrote:
> > > > So far, has I can understand. Seems to me that my computer which have
> > > > a Pentium D (Dual Core) on VIA chipset, also have unsynchronized TSC
> > > > and with the patch of hrtimers on
> > >
> > > Intel systems (except for some large highend systems) have synchronized
> > > TSCs.
> >
> > Does Intel guarantee that, or is that just what we happen to see, so far.
>
> Matthias has a Xeon machine on which the TSCs are unsynced, and which are
> unsyncable - write_tsc() just doesn't do anything.  See thread at
> http://lkml.org/lkml/2006/7/22/104

That is a clear BIOS bug (FSBs are programmed incorrectly) and doesn't seem to 
be common. In fact the BIOS bug is so bad that it's surprising the system
works at all.

-Andi
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