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Message-ID: <ada8xiwtg81.fsf@cisco.com>
Date:	Tue, 31 Oct 2006 11:53:02 -0800
From:	Roland Dreier <rdreier@...co.com>
To:	"Michael S. Tsirkin" <mst@...lanox.co.il>
Cc:	linux-kernel@...r.kernel.org, linux-ia64@...r.kernel.org,
	jeff@...zik.org, matthew@....cx, openib-general@...nib.org,
	linux-pci@...ey.karlin.mff.cuni.cz,
	David Miller <davem@...emloft.net>
Subject: Re: Ordering between PCI config space writes and MMIO reads?

 > Here's what I don't understand: according to PCI rules, pci config read
 > can bypass pci config write (both are non-posted).
 > So why does doing it help flush the writes as the comment claims?

No, I don't believe a read of a config register can pass a write of
the same register.  (Someone correct me if I'm wrong)

 - R.
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