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Message-ID: <20061031195811.GF26964@parisc-linux.org>
Date: Tue, 31 Oct 2006 12:58:11 -0700
From: Matthew Wilcox <matthew@....cx>
To: Roland Dreier <rdreier@...co.com>
Cc: "Michael S. Tsirkin" <mst@...lanox.co.il>,
linux-kernel@...r.kernel.org, linux-ia64@...r.kernel.org,
jeff@...zik.org, openib-general@...nib.org,
linux-pci@...ey.karlin.mff.cuni.cz,
David Miller <davem@...emloft.net>
Subject: Re: Ordering between PCI config space writes and MMIO reads?
On Tue, Oct 31, 2006 at 11:53:02AM -0800, Roland Dreier wrote:
> > Here's what I don't understand: according to PCI rules, pci config read
> > can bypass pci config write (both are non-posted).
> > So why does doing it help flush the writes as the comment claims?
>
> No, I don't believe a read of a config register can pass a write of
> the same register. (Someone correct me if I'm wrong)
I don't see anything in the PCI spec which forbids it, but I would
expect that hardware designers don't actually do that in practice.
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