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Message-Id: <200611130023.12126.sshtylyov@ru.mvista.com>
Date: Mon, 13 Nov 2006 00:23:12 +0300
From: Sergei Shtylyov <sshtylyov@...mvista.com>
To: mingo@...e.hu
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...ux-mips.org,
dwalker@...sta.com, khilman@...sta.com
Subject: [PATCH] 2.6.18-rt7: fix more issues with 32-bit cycles_t in latency_trace.c
In addition to clock wrap check being falsely triggered with 32-bit cycles_t,
as noticed to Kevin Hilman, there's another issue: using %Lx format to print
32-bit values warrants erroneous values on 32-bit machines like ARM and PPC32.
Signed-off-by: Sergei Shtylyov <sshtylyov@...mvista.com>
---
PPC32 actually has 64-bit timebase counter, so could provide for 64-bit
cycles_t -- maybe it's worth to rewrite get_cycles() to read both lower and
upper registers?
Index: linux-2.6/kernel/latency_trace.c
===================================================================
--- linux-2.6.orig/kernel/latency_trace.c
+++ linux-2.6/kernel/latency_trace.c
@@ -1623,8 +1623,8 @@ check_critical_timing(int cpu, struct cp
#ifndef CONFIG_CRITICAL_LATENCY_HIST
if (!preempt_thresh && preempt_max_latency > delta) {
printk("bug: updating %016Lx > %016Lx?\n",
- preempt_max_latency, delta);
- printk(" [%016Lx %016Lx %016Lx]\n", T0, T1, T2);
+ (u64)preempt_max_latency, (u64)delta);
+ printk(" [%016Lx %016Lx %016Lx]\n", (u64)T0, (u64)T1, (u64)T2);
}
#endif
-
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