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Message-ID: <20061206220532.GF3013@parisc-linux.org>
Date:	Wed, 6 Dec 2006 15:05:32 -0700
From:	Matthew Wilcox <matthew@....cx>
To:	Christoph Lameter <clameter@....com>
Cc:	David Howells <dhowells@...hat.com>, torvalds@...l.org,
	akpm@...l.org, linux-arm-kernel@...ts.arm.linux.org.uk,
	linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org
Subject: Re: [PATCH] WorkStruct: Implement generic UP cmpxchg() where an arch doesn't support it

On Wed, Dec 06, 2006 at 01:52:20PM -0800, Christoph Lameter wrote:
> On Wed, 6 Dec 2006, Matthew Wilcox wrote:
> 
> > And for those of us with only load-and-zero, that's simply:
> > 
> > #define load_locked(addr) spin_lock(hash(addr)), *addr
> > #define store_exclusive(addr, old, new) \
> > 			*addr = new, spin_unlock(hash(addr)), 0
> > 
> > which is also optimal for us.
> 
> This means we tolerate the assignment race for SMP that was pointed out 
> earlier?

What gave you that impression?  It simply wasn't part of this example.

To be honest, it'd be much easier if we only defined these operations on
atomic_t's.  We have all the infrastructure in place for them, and
they're fairly well understood.  If you need different sizes, I'm OK
with an atomic_pointer_t, or whatever.

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