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Message-ID: <Pine.LNX.4.64.0612061345160.28672@schroedinger.engr.sgi.com>
Date:	Wed, 6 Dec 2006 13:52:20 -0800 (PST)
From:	Christoph Lameter <clameter@....com>
To:	Matthew Wilcox <matthew@....cx>
cc:	David Howells <dhowells@...hat.com>, torvalds@...l.org,
	akpm@...l.org, linux-arm-kernel@...ts.arm.linux.org.uk,
	linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org
Subject: Re: [PATCH] WorkStruct: Implement generic UP cmpxchg() where an arch
 doesn't support it

On Wed, 6 Dec 2006, Matthew Wilcox wrote:

> And for those of us with only load-and-zero, that's simply:
> 
> #define load_locked(addr) spin_lock(hash(addr)), *addr
> #define store_exclusive(addr, old, new) \
> 			*addr = new, spin_unlock(hash(addr)), 0
> 
> which is also optimal for us.

This means we tolerate the assignment race for SMP that was pointed out 
earlier?

cmpxchg emulation may then also be tolerable just replace the irq 
enable/disable in David's implementation with taking a spin lock?

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