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Date:	Thu, 18 Jan 2007 09:15:32 +1100
From:	Andi Kleen <ak@...e.de>
To:	Chip Coldwell <coldwell@...hat.com>
Cc:	Chris Wedgwood <cw@...f.org>,
	Christoph Anton Mitterer <calestyo@...entia.net>,
	Robert Hancock <hancockr@...w.ca>,
	linux-kernel@...r.kernel.org, knweiss@....de,
	andersen@...epoet.org, krader@...ibm.com, lfriedman@...dia.com,
	linux-nforce-bugs@...dia.com
Subject: Re: data corruption with nvidia chipsets and IDE/SATA drives (k8 cpu errata needed?)


> We've just verified that configuring the graphics aperture to be
> write-combining instead of write-back using an MTRR also solves the
> problem.  It appears to be a cache incoherency issue in the graphics
> aperture.

Interesting. 

Unfortunately it is also not correct. It was intentional to 
mark the IOMMU half. of the aperture write-back, as opposed
to uncached as the AGP half. Otherwise you get illegal cache attribute 
conflicts with the memory that is being remapped which can also cause 
corruption.

The Northbridge guarantees coherency over the aperture, but 
only if the caching attributes match. 

You would need to change_page_attr() every kernel address that is mapped into 
the  IOMMU to use an uncached aperture. AGP does this, but the frequency of 
mapping for the IOMMU  is much higher and it would be prohibitively costly
unfortunately. 

In the past we saw corruptions from such conflicts, so this is more
than just theory. I suspect  you traded a more easy to trigger corruption with 
a more subtle one.

-Andi

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